ZHCSGT4 September 2017 LP87332A-Q1

PRODUCTION DATA. 

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6I2C Serial Bus Timing Parameters
    7. 6.7Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1 DC-DC Converters
        1. 7.3.1.1Overview
        2. 7.3.1.2Transition Between PWM and PFM Modes
        3. 7.3.1.3Buck Converter Load Current Measurement
        4. 7.3.1.4Spread-Spectrum Mode
      2. 7.3.2 Sync Clock Functionality
      3. 7.3.3 Low-Dropout Linear Regulators (LDOs)
      4. 7.3.4 Power-Up
      5. 7.3.5 Regulator Control
        1. 7.3.5.1Enabling and Disabling Regulators
        2. 7.3.5.2Changing Output Voltage
      6. 7.3.6 Enable and Disable Sequences
      7. 7.3.7 Device Reset Scenarios
      8. 7.3.8 Diagnosis and Protection Features
        1. 7.3.8.1Power-Good Information (PGOOD pin)
          1. 7.3.8.1.1PGOOD Pin Gated mode
          2. 7.3.8.1.2PGOOD Pin Continuous Mode
        2. 7.3.8.2Warnings for Diagnosis (Interrupt)
          1. 7.3.8.2.1Output Power Limit
          2. 7.3.8.2.2Thermal Warning
        3. 7.3.8.3Protection (Regulator Disable)
          1. 7.3.8.3.1 Short-Circuit and Overload Protection
          2. 7.3.8.3.2Overvoltage Protection
          3. 7.3.8.3.3Thermal Shutdown
        4. 7.3.8.4Fault (Power Down)
          1. 7.3.8.4.1Undervoltage Lockout
      9. 7.3.9 Operation of the GPO Signals
      10. 7.3.10Digital Signal Filtering
    4. 7.4Device Functional Modes
      1. 7.4.1Modes of Operation
    5. 7.5Programming
      1. 7.5.1I2C-Compatible Interface
        1. 7.5.1.1Data Validity
        2. 7.5.1.2Start and Stop Conditions
        3. 7.5.1.3Transferring Data
        4. 7.5.1.4I2C-Compatible Chip Address
        5. 7.5.1.5Auto-Increment Feature
    6. 7.6Register Maps
      1. 7.6.1Register Descriptions
        1. 7.6.1.1 DEV_REV
        2. 7.6.1.2 OTP_REV
        3. 7.6.1.3 BUCK0_CTRL_1
        4. 7.6.1.4 BUCK0_CTRL_2
        5. 7.6.1.5 BUCK1_CTRL_1
        6. 7.6.1.6 BUCK1_CTRL_2
        7. 7.6.1.7 BUCK0_VOUT
        8. 7.6.1.8 BUCK1_VOUT
        9. 7.6.1.9 LDO0_CTRL
        10. 7.6.1.10LDO1_CTRL
        11. 7.6.1.11LDO0_VOUT
        12. 7.6.1.12LDO1_VOUT
        13. 7.6.1.13BUCK0_DELAY
        14. 7.6.1.14BUCK1_DELAY
        15. 7.6.1.15LDO0_DELAY
        16. 7.6.1.16LDO1_DELAY
        17. 7.6.1.17GPO_DELAY
        18. 7.6.1.18GPO2_DELAY
        19. 7.6.1.19GPO_CTRL
        20. 7.6.1.20CONFIG
        21. 7.6.1.21PLL_CTRL
        22. 7.6.1.22PGOOD_CTRL_1
        23. 7.6.1.23PGOOD_CTRL_2
        24. 7.6.1.24PG_FAULT
        25. 7.6.1.25RESET
        26. 7.6.1.26INT_TOP_1
        27. 7.6.1.27INT_TOP_2
        28. 7.6.1.28INT_BUCK
        29. 7.6.1.29INT_LDO
        30. 7.6.1.30TOP_STAT
        31. 7.6.1.31BUCK_STAT
        32. 7.6.1.32LDO_STAT
        33. 7.6.1.33TOP_MASK_1
        34. 7.6.1.34TOP_MASK_2
        35. 7.6.1.35BUCK_MASK
        36. 7.6.1.36LDO_MASK
        37. 7.6.1.37SEL_I_LOAD
        38. 7.6.1.38I_LOAD_2
        39. 7.6.1.39I_LOAD_1
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Application
      1. 8.2.1Design Requirements
        1. 8.2.1.1Inductor Selection
        2. 8.2.1.2Buck Input Capacitor Selection
        3. 8.2.1.3Buck Output Capacitor Selection
        4. 8.2.1.4LDO Input Capacitor Selection
        5. 8.2.1.5LDO Output Capacitor Selection
      2. 8.2.2Detailed Design Procedure
      3. 8.2.3Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Example
  11. 11器件和文档支持
    1. 11.1器件支持
      1. 11.1.1Third-Party Products Disclaimer
    2. 11.2接收文档更新通知
    3. 11.3社区资源
    4. 11.4商标
    5. 11.5静电放电警告
    6. 11.6Glossary
  12. 12机械、封装和可订购信息

Power Supply Recommendations

The device is designed to operate from an input voltage supply range between 2.8 V and 5.5 V. The VANA input and VIN_Bx buck inputs must be connected together and they must use the same input supply. This input supply must be well regulated and able to withstand maximum input current and maintain stable voltage without voltage drop even at load transition condition. The resistance of the input supply rail must be low enough that the input current transient does not cause too high a drop in the LP87332A-Q1 supply voltage that can cause false UVLO fault triggering. If the input supply is located more than a few inches from the LP87332A-Q1 additional bulk capacitance may be required in addition to the ceramic bypass capacitors. The VIN_LDOx LDO input supply voltage range is 2.5 V to 5.5 V and can be higher or lower than VANA supply voltage.