SNOSAI9I September   2005  – November 2015 LMP7701 , LMP7702 , LMP7704

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics 3-V
    6. 7.6 Electrical Characteristics 5-V
    7. 7.7 Electrical Characteristics ±5-V
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Capacitive Load
      2. 8.3.2 Input Capacitance
      3. 8.3.3 Diodes Between the Inputs
    4. 8.4 Device Functional Modes
      1. 8.4.1 Precision Current Source
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Low Input Voltage Noise
      2. 9.1.2 Total Noise Contribution
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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10 Power Supply Recommendations

For proper operation, the power supplies must be decoupled. For supply decoupling, TI recommends placing
10-nF to 1-µF capacitors as close as possible to the operational-amplifier power supply pins. For single supply configurations, place a capacitor between the V+ and V– supply pins. For dual supply configurations, place one capacitor between V+ and ground, and place a second capacitor between V– and ground. Bypass capacitors must have a low ESR of less than 0.1 Ω.