SNOSA42G November   2002  – December 2014 LMH6624 , LMH6626

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics ±2.5 V
    6. 6.6 Electrical Characteristics ±6 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Feature Description
      1. 7.2.1 Bias Current Cancellation
      2. 7.2.2 Total Input Noise vs. Source Resistance
      3. 7.2.3 Noise Figure
      4. 7.2.4 Low Noise Integrator
      5. 7.2.5 High-gain Sallen-key Active Filters
      6. 7.2.6 Low Noise Magnetic Media Equalizer
    3. 7.3 Device Functional Modes
      1. 7.3.1 Single Supply Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

Package DBV
5-Pin SOT-23 (LMH6624)
Top View
20058951.gif
Package D
8-Pin SOIC (LMH6624)
Top View
20058952.gif
Package D or DGK
8-Pin SOIC Package D and VSSOP (LMH6626)
Top View
20058961.png

Pin Functions

PIN I/O DESCRIPTION
NAME NUMBER
LMH6624 LMH6626
DBV D DGK or D
-IN 4 2 – I Inverting Input
+IN 3 3 – I Non-inverting Input
IN A- – – 2 I Inverting Input Channel A
IN B- – – 6 I Inverting Input Channel B
IN A+ – – 3 I Non-inverting Input Channel A
IN B+ – – 5 I Non-inverting Input Channel B
N/C – 1, 5, 8 – –– No Connection
OUT 1 6 – O Output
OUT A – – 1 O Output Channel A
OUT B – – 7 O Output Channel B
V- 2 4 4 I Negative Supply
V+ 5 7 8 I Positive Supply