产品详情

Architecture Fixed Gain/Buffer Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 10 GBW (typ) (MHz) 1750 BW at Acl (MHz) 1750 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 4580 Vn at flatband (typ) (nV√Hz) 3.9 Vn at 1 kHz (typ) (nV√Hz) 13 Iq per channel (typ) (mA) 10 Vos (offset voltage at 25°C) (max) (mV) 1 Rating Catalog Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 74 2nd harmonic (dBc) 58 3rd harmonic (dBc) 53 Frequency of harmonic distortion measurement (MHz) 20
Architecture Fixed Gain/Buffer Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 10 GBW (typ) (MHz) 1750 BW at Acl (MHz) 1750 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 4580 Vn at flatband (typ) (nV√Hz) 3.9 Vn at 1 kHz (typ) (nV√Hz) 13 Iq per channel (typ) (mA) 10 Vos (offset voltage at 25°C) (max) (mV) 1 Rating Catalog Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 74 2nd harmonic (dBc) 58 3rd harmonic (dBc) 53 Frequency of harmonic distortion measurement (MHz) 20
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Closed-Loop Buffer
  • 1750MHz Small Signal Bandwidth
  • 4580V/μs Slew Rate
  • 0.06% / 0.02° Differential Gain/Phase
  • −52dBc THD at 20MHz
  • Single Supply Operation (3V Min.)
  • 75mA Output Current

All trademarks are the property of their respective owners.

  • Closed-Loop Buffer
  • 1750MHz Small Signal Bandwidth
  • 4580V/μs Slew Rate
  • 0.06% / 0.02° Differential Gain/Phase
  • −52dBc THD at 20MHz
  • Single Supply Operation (3V Min.)
  • 75mA Output Current

All trademarks are the property of their respective owners.

The LMH6559 is a high-speed, closed-loop buffer designed for applications requiring the processing of very high frequency signals. While offering a small signal bandwidth of 1750MHz, and an ultra high slew rate of 4580V/μs the LMH6559 consumes only 10mA of quiescent current. Total harmonic distortion into a load of 100Ω at 20MHz is −52dBc. The LMH6559 is configured internally for a loop gain of one. Input resistance is 200kΩ and output resistance is but 1.2Ω. These characteristics make the LMH6559 an ideal choice for the distribution of high frequency signals on printed circuit boards. Differential gain and phase specifications of 0.06% and 0.02° respectively at 3.58MHz make the LMH6559 well suited for the buffering of video signals.

The device is fabricated on Texas Instruments' high-speed VIP10 process using TI's proven high performance circuit architectures.

The LMH6559 is a high-speed, closed-loop buffer designed for applications requiring the processing of very high frequency signals. While offering a small signal bandwidth of 1750MHz, and an ultra high slew rate of 4580V/μs the LMH6559 consumes only 10mA of quiescent current. Total harmonic distortion into a load of 100Ω at 20MHz is −52dBc. The LMH6559 is configured internally for a loop gain of one. Input resistance is 200kΩ and output resistance is but 1.2Ω. These characteristics make the LMH6559 an ideal choice for the distribution of high frequency signals on printed circuit boards. Differential gain and phase specifications of 0.06% and 0.02° respectively at 3.58MHz make the LMH6559 well suited for the buffering of video signals.

The device is fabricated on Texas Instruments' high-speed VIP10 process using TI's proven high performance circuit architectures.

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类型 标题 下载最新的英语版本 日期
* 数据表 LMH6559 High-Speed, Closed-Loop Buffer 数据表 (Rev. C) 2013年 3月 18日
电子书 The Signal e-book: 有关运算放大器设计主题的博客文章汇编 英语版 2018年 1月 31日
用户指南 AN-2095 LMH730316 SOT23-5 / SOT23-6 Hi Performance Amplifier Eval Board (Rev. B) 2013年 5月 1日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

评估板

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用户指南: PDF
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评估板

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仿真模型

LMH6559 PSPICE Model

SNOM159.ZIP (2 KB) - PSpice Model
计算工具

ANALOG-ENGINEER-CALC — 模拟工程师计算器

模拟工程师计算器旨在加快模拟电路设计工程师经常使用的许多重复性计算。该基于 PC 的工具提供图形界面,其中显示各种常见计算的列表(从使用反馈电阻器设置运算放大器增益到为稳定模数转换器 (ADC) 驱动器缓冲器电路选择合适的电路设计元件)。除了可用作单独的工具之外,该计算器还能够很好地与模拟工程师口袋参考书中所述的概念配合使用。
计算工具

VOLT-DIVIDER-CALC — Voltage divider calculation tool

The voltage divider calculation tool (VOLT-DIVIDER-CALC) quickly determines a set of resistors for a voltage divider. This KnowledgeBase JavaScript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. VOLT-DIVIDER-CALC can also be used to (...)
模拟工具

PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
模拟工具

TINA-TI — 基于 SPICE 的模拟仿真程序

TINA-TI 提供了 SPICE 所有的传统直流、瞬态和频域分析以及更多。TINA 具有广泛的后处理功能,允许您按照希望的方式设置结果的格式。虚拟仪器允许您选择输入波形、探针电路节点电压和波形。TINA 的原理图捕获非常直观 - 真正的“快速入门”。

TINA-TI 安装需要大约 500MB。直接安装,如果想卸载也很容易。我们相信您肯定会爱不释手。

TINA 是德州仪器 (TI) 专有的 DesignSoft 产品。该免费版本具有完整的功能,但不支持完整版 TINA 所提供的某些其他功能。

如需获取可用 TINA-TI 模型的完整列表,请参阅:SpiceRack - 完整列表 

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用户指南: PDF
英语版 (Rev.A): PDF
参考设计

TIDA-00826 — 50Ω 2GHz 示波器前端参考设计

此参考设计是 50Ω 输入示波器应用的模拟前端的一部分。系统设计人员可轻松使用此评估平台来处理频域和时域应用中的直流到 2GHz 的输入信号。
设计指南: PDF
原理图: PDF
封装 引脚 下载
SOIC (D) 8 查看选项
SOT-23 (DBV) 5 查看选项

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

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