LMC662 CMOS 双路运算放大器 | 德州仪器 TI.com.cn

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CMOS 双路运算放大器

CMOS 双路运算放大器 - LMC662


  • LM8272  -  Higher Bandwidth, Higher Slew Rate, RRIO, Lower Noise.
  • LMP7702  -  Higher Precision, RRIO, Higher CMRR


The LMC662 CMOS Dual operational amplifier is ideal for operation from a single supply. It operates from +5V to +15V and features rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain into realistic loads (2 kΩ and 600Ω) are all equal to or better than widely accepted bipolar equivalents.

This chip is built with TI's advanced Double-Poly Silicon-Gate CMOS process.

See the LMC660 datasheet for a Quad CMOS operational amplifier with these same features.


  • Rail-to-Rail Output Swing
  • Specified for 2 kΩ and 600Ω Loads
  • High Voltage Gain: 126 dB
  • Low Input Offset Voltage: 3 mV
  • Low Offset Voltage Drift: 1.3 μV/°C
  • Ultra Low Input Bias Current: 2 fA
  • Input Common-Mode Range Includes V
  • Operating Range from +5V to +15V Supply
  • ISS = 400 μA/amplifier; Independent of V+
  • Low Distortion: 0.01% at 10 kHz
  • Slew Rate: 1.1 V/μs

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Part number 立即下单 Number of channels (#) Total supply voltage (Min) (+5V=5, +/-5V=10) Total supply voltage (Max) (+5V=5, +/-5V=10) GBW (Typ) (MHz) Slew rate (Typ) (V/us) Rail-to-rail Vos (offset voltage @ 25 C) (Max) (mV) Iq per channel (Typ) (mA) Vn at 1 kHz (Typ) (nV/rtHz) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Offset drift (Typ) (uV/C) Features Input bias current (Max) (pA) CMRR (Typ) (dB) Output current (Typ) (mA) Architecture
LMC662 立即下单 2     4.75     15.5     1.4     1.1     In to V-
3     0.38     22     Catalog     -40 to 85
0 to 70    
PDIP | 8
SOIC | 8    
8PDIP: 93 mm2: 9.43 x 9.81 (PDIP | 8)
8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)    
1.3         20     83     21     CMOS