SNOSBH0D May 2000  – November 2015 LF156 , LF256 , LF356

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5AC Electrical Characteristics, TA = TJ = 25°C, VS = ±15 V
    6. 6.6DC Electrical Characteristics, TA = TJ = 25°C, VS = ±15 V
    7. 6.7DC Electrical Characteristics
    8. 6.8Power Dissipation Ratings
    9. 6.9Typical Characteristics
      1. 6.9.1Typical DC Performance Characteristics
      2. 6.9.2Typical AC Performance Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1Large Differential Input Voltage
      2. 7.3.2Large Common-Mode Input Voltage
    4. 7.4Device Functional Modes
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Application
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
      3. 8.2.3Application Curves
    3. 8.3System Examples
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
      1. 10.1.1Printed-Circuit-Board Layout For High-Impedance Work
    2. 10.2Layout Example
  11. 11Device and Documentation Support
    1. 11.1Related Links
    2. 11.2Community Resources
    3. 11.3Trademarks
    4. 11.4Electrostatic Discharge Caution
    5. 11.5Glossary
  12. 12Mechanical, Packaging, and Orderable Information

1 Features

  • Advantages
    • Replace Expensive Hybrid and Module FET Op Amps
    • Rugged JFETs Allow Blow-Out Free Handling Compared With MOSFET Input Devices
    • Excellent for Low Noise Applications Using Either High or Low Source Impedance—Very Low 1/f Corner
    • Offset Adjust Does Not Degrade Drift or Common-Mode Rejection as in Most Monolithic Amplifiers
    • New Output Stage Allows Use of Large Capacitive Loads (5,000 pF) Without Stability Problems
    • Internal Compensation and Large Differential Input Voltage Capability
  • Common Features
    • Low Input Bias Current: 30 pA
    • Low Input Offset Current: 3 pA
    • High Input Impedance: 1012 Ω
    • Low Input Noise Current: 0.01 pA/√Hz
    • High Common-Mode Rejection Ratio: 100 dB
    • Large DC Voltage Gain: 106 dB
  • Uncommon Features
    • Extremely Fast Settling Time to 0.01%:
      • 4 μs for the LFx55 devices
      • 1.5 μs for the LFx56
      • 1.5 μs for the LFx57 (AV = 5)
    • Fast Slew Rate:
      • 5 V/µs for the LFx55
      • 12 V/µs for the LFx56
      • 50 V/µs for the LFx57 (AV = 5)
    • Wide Gain Bandwidth:
      • 2.5 MHz for the LFx55 devices
      • 5 MHz for the LFx56
      • 20 MHz for the LFx57 (AV = 5)
    • Low Input Noise Voltage:
      • 20 nV/√Hz for the LFx55
      • 12 nV/√Hz for the LFx56
      • 12 nV/√Hz for the LFx57 (AV = 5)

2 Applications

  • Precision High-Speed Integrators
  • Fast D/A and A/D Converters
  • High Impedance Buffers
  • Wideband, Low Noise, Low Drift Amplifiers
  • Logarithmic Amplifiers
  • Photocell Amplifiers
  • Sample and Hold Circuits

3 Description

The LFx5x devices are the first monolithic JFET input operational amplifiers to incorporate well-matched, high-voltage JFETs on the same chip with standard bipolar transistors (BI-FET™ Technology). These amplifiers feature low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust, which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
LFx5xSOIC (8)4.90 mm × 3.91 mm
TO-CAN (8)9.08 mm × 9.08 mm
PDIP (8)9.81 mm × 6.35 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

LF155 LF156 LF256 LF257 LF355 LF356 LF357 00564601.png
3 pF in LF357 series

4 Revision History

Changes from C Revision (March 2013) to D Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Thermal Information table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Removed THIGH parameter as it is redundant to TA maximumGo

Changes from B Revision (March 2013) to C Revision

  • Changed layout of National Data Sheet to TI formatGo