主页 接口 其他接口
主页
接口
其他接口

DS92LV3242

正在供货

20-85 MHz 32 位频道链接 II 解串器

立即订购
数据表

DS92LV3242

正在供货
数据表 立即订购

产品详情

Protocols Catalog Rating Catalog Operating temperature range (°C) -40 to 85
Protocols Catalog Rating Catalog Operating temperature range (°C) -40 to 85
TQFP (PAG) 64 144 mm² 12 x 12
  • Wide Operating Range Embedded Clock SER/DES
    • Up to 32-bit Parallel LVCMOS Data
    • 20 to 85 MHz Parallel Clock
    • Up to 2.72 Gbps Application Data Paylod
  • Selectable Serial LVDS Bus Width
    • Dual Lane Mode (20 to 50 MHz)
    • Quad Lane Mode (40 to 85 MHz)
  • Simplified Clocking Architecture
    • No Separate Serial Clock Line
    • No reference Clock Required
    • Receiver Locks to Random Data
  • On-Chip Signal Conditioning for Robust Serial Connectivity
    • Transmit Pre-Emphasis
    • Data Randomization
    • DC-Balance Encoding
    • Receive Channel Deskew
    • Supports up to 10m CAT-5 at 2.7 Gbps
  • Integrated LVDS Terminations
  • Built-in AT-SPEED BIST for End-to-End System Testing
  • AC-Coupled Interconnect for Isolation and Fault Protection
  • > 4KV HBM ESD Protection
  • Space-Saving 64-pin TQFP Package
  • Full Industrial Temperature Range : -40° to +85°C

All trademarks are the property of their respective owners.

  • Wide Operating Range Embedded Clock SER/DES
    • Up to 32-bit Parallel LVCMOS Data
    • 20 to 85 MHz Parallel Clock
    • Up to 2.72 Gbps Application Data Paylod
  • Selectable Serial LVDS Bus Width
    • Dual Lane Mode (20 to 50 MHz)
    • Quad Lane Mode (40 to 85 MHz)
  • Simplified Clocking Architecture
    • No Separate Serial Clock Line
    • No reference Clock Required
    • Receiver Locks to Random Data
  • On-Chip Signal Conditioning for Robust Serial Connectivity
    • Transmit Pre-Emphasis
    • Data Randomization
    • DC-Balance Encoding
    • Receive Channel Deskew
    • Supports up to 10m CAT-5 at 2.7 Gbps
  • Integrated LVDS Terminations
  • Built-in AT-SPEED BIST for End-to-End System Testing
  • AC-Coupled Interconnect for Isolation and Fault Protection
  • > 4KV HBM ESD Protection
  • Space-Saving 64-pin TQFP Package
  • Full Industrial Temperature Range : -40° to +85°C

All trademarks are the property of their respective owners.

The DS92LV3241 (SER) serializes a 32-bit data bus into 2 or 4 (selectable) embedded clock LVDS serial channels for a data payload rate up to 2.72 Gbps over cables such as CATx, or backplanes FR-4 traces. The companion DS92LV3242 (DES) deserializes the 2 or 4 LVDS serial data channels, de-skews channel-to-channel delay variations and converts the LVDS data stream back into a 32-bit LVCMOS parallel data bus.

On-chip data Randomization/Scrambling and DC balance encoding and selectable serializer Pre-emphasis ensure a robust, low-EMI transmission over longer, lossy cables and backplanes. The Deserializer automatically locks to incoming data without an external reference clock or special sync patterns, providing an easy “plug-and-lock” operation.

By embedding the clock in the data payload and including signal conditioning functions, the Channel-Link II SerDes devices reduce trace count, eliminate skew issues, simplify design effort and lower cable/connector cost for a wide variety of video, control and imaging applications. A built-in AT-SPEED BIST feature validates link integrity and may be used for system diagnostics.

The DS92LV3241 (SER) serializes a 32-bit data bus into 2 or 4 (selectable) embedded clock LVDS serial channels for a data payload rate up to 2.72 Gbps over cables such as CATx, or backplanes FR-4 traces. The companion DS92LV3242 (DES) deserializes the 2 or 4 LVDS serial data channels, de-skews channel-to-channel delay variations and converts the LVDS data stream back into a 32-bit LVCMOS parallel data bus.

On-chip data Randomization/Scrambling and DC balance encoding and selectable serializer Pre-emphasis ensure a robust, low-EMI transmission over longer, lossy cables and backplanes. The Deserializer automatically locks to incoming data without an external reference clock or special sync patterns, providing an easy “plug-and-lock” operation.

By embedding the clock in the data payload and including signal conditioning functions, the Channel-Link II SerDes devices reduce trace count, eliminate skew issues, simplify design effort and lower cable/connector cost for a wide variety of video, control and imaging applications. A built-in AT-SPEED BIST feature validates link integrity and may be used for system diagnostics.
open-in-new 查找其他 其他接口
下载 观看带字幕的视频 视频

技术文档

star =有关此产品的 TI 精选热门文档
未找到结果。请清除搜索并重试。
查看全部 7
类型 标题 下载最新的英语版本 日期
* 数据表 DS92LV3241/3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer 数据表 (Rev. D) 2013年 4月 16日
应用手册 High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs 2018年 11月 9日
应用手册 DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E) 2013年 4月 29日
应用手册 Improving the Robustness of Channel Link Designs with Channel Link II Ser/Des (Rev. A) 2013年 4月 26日
用户指南 DS92LV3241/DS92LV3242 Demonstration Kit User Manual 2012年 1月 25日
设计指南 Channel Link II Design Guide 2011年 1月 21日
应用手册 App Note 1909 DS15BA101 & DS15EA101 Enable Long Reach Apps for Embed Clk SERDES 2009年 3月 2日

设计和开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

模拟工具

PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用，包括业内超大的模型库之一，涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库，您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案，然后再进行布局和制造，可缩短产品上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中，您可以搜索 TI (...)
发送申请
模拟工具

TINA-TI — 基于 SPICE 的模拟仿真程序

TINA-TI 提供了 SPICE 所有的传统直流、瞬态和频域分析以及更多。TINA 具有广泛的后处理功能，允许您按照希望的方式设置结果的格式。虚拟仪器允许您选择输入波形、探针电路节点电压和波形。TINA 的原理图捕获非常直观 - 真正的“快速入门”。

TINA-TI 安装需要大约 500MB。直接安装，如果想卸载也很容易。我们相信您肯定会爱不释手。

TINA 是德州仪器 (TI) 专有的 DesignSoft 产品。该免费版本具有完整的功能，但不支持完整版 TINA 所提供的某些其他功能。

如需获取可用 TINA-TI 模型的完整列表，请参阅：SpiceRack - 完整列表 

需要 HSpice (...)

用户指南: PDF
英语版 (Rev.A): PDF
查看选项
封装 引脚 下载
TQFP (PAG) 64 查看选项
应遵守 TI 评估类商品的标准条款与条件。

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。

支持和培训

视频