DS92LV2421 10 至 75 MHz,24 位频道链接 II 串行器 | 德州仪器 TI.com.cn

DS92LV2421 (正在供货) 10 至 75 MHz,24 位频道链接 II 串行器

 

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  • DS92LX2121  - 器件与被比较器件具有相似功能,但并不功能等效。 
  • DS92LV2422  -  Companion 24-bit channel link II deserializer

描述

The DS92LV242x chipset translates a parallel 24–bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size, and reduces interconnect cost for transferring a 24-bit or less bus over FR-4 printed-circuit board backplanes and balanced cables. In addition, the DS92LV242x chipset also features a 3-bit control bus for slow speed signals. This allows for video and display applications with up to 24 bits per pixel (RGB).

Programmable transmit de-emphasis, receive equalization, on-chip scrambling, and DC balancing enables longer distance transmission over lossy cables and backplanes. The DS92LV2422 automatically locks to incoming data without an external reference clock or special sync patterns, providing easy plug-and-go operation. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking capability.

The DS92LV242x chipset is programmable though an I2C interface as well as through pins. A built-in, at-speed BIST feature validates link integrity and may be used for system diagnostics. The DS92LV2421 is offered in a 48-pin WQFN, and the DS92LV2422 is offered in a 60-pin WQFN package. Both devices operate over the full industrial temperature range of –40°C to 85°C.

特性

  • 24-Bit Data, 3-Bit Control, 10- to 75-MHz Clock
  • AC-Coupled STP Interconnect Cable up to 10 m
  • Integrated Terminations on Serializer and
    Deserializer
  • At-Speed Link BIST Mode and Reporting Pin
  • Optional I2C-Compatible Serial Control Bus
  • Power-Down Mode Minimizes Power Dissipation
  • 1.8-V or 3.3-V Compatible LVCMOS I/O Interface
  • –40° to 85°C Temperature Range
  • >8-kV HBM
  • Serializer (DS92LV2421)
    • Data Scrambler for Reduced EMI
    • DC-Balance Encoder for AC Coupling
    • Selectable Output VOD and Adjustable
      De-emphasis
  • Deserializer (DS92LV2422)
    • Fast Random Data Lock; No Reference Clock
      Required
    • Adjustable Input Receiver Equalization
    • LOCK (Real-Time Link Status) Reporting Pin
    • EMI Minimization on Output Parallel Bus
      (SSCG)
    • Output Slew Control (OS)

参数

与其它产品相比 SerDes/信道链路 邮件 下载到电子表格中
Part number 立即下单 Protocols Function Parallel bus width (bits) Compression ratio ESD (kV) Input compatibility Output compatibility Supply voltage(s) (V) Data throughput (Mbps) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG)
DS92LV2421 立即下单 Channel-Link II     Serializer     24     24 to 1     8     LVCMOS     CML     1.8     1800     Catalog     -40 to 85     WQFN | 48     48WQFN: 49 mm2: 7 x 7 (WQFN | 48)    
DS92LV0411 立即下单 Channel-Link II     Serializer     24     24 to 1     8     LVDS     CML     1.8     1200     Catalog     -40 to 85        
DS92LV0412 立即下单 Channel-Link II     Deserializer     24     24 to 1     8     CML     LVDS     1.8     1200     Catalog     -40 to 85     WQFN | 48     48WQFN: 49 mm2: 7 x 7 (WQFN | 48)    
DS92LV0421 立即下单 Channel-Link II     Serializer     24     24 to 1     8     LVCMOS     CML     1.8     1800     Catalog     -40 to 85        
DS92LV0422 立即下单 Channel-Link II     Deserializer     24     24 to 1     8     CML     LVCMOS     1.8     1800     Catalog     -40 to 85     WQFN | 48     48WQFN: 49 mm2: 7 x 7 (WQFN | 48)    
DS92LV2411 立即下单 Channel-Link II     Serializer     24     24 to 1     8     LVCMOS     CML     1.8     1200     Catalog     -40 to 85     WQFN | 48     48WQFN: 49 mm2: 7 x 7 (WQFN | 48)    
DS92LV2412 立即下单 Channel-Link II     Deserializer     24     24 to 1     8     CML     LVCMOS     1.8     1200