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DS92LV1260

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6 通道、10 位 B-LVDS 通道链接解串器

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DS92LV1260

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产品详情

Function Deserializer Protocols Channel-Link I Number of transmitters 10 Number of receivers 6 Supply voltage (V) 3.3 Signaling rate (MBits) 2400 Input signal BLVDS, LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Deserializer Protocols Channel-Link I Number of transmitters 10 Number of receivers 6 Supply voltage (V) 3.3 Signaling rate (MBits) 2400 Input signal BLVDS, LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (NZH) 196 225 mm² 15 x 15
  • Deserializes One to Six BusLVDS Input Serial Data Streams with Embedded Clocks
  • Seven Selectable Serial Inputs to Support n+1 Redundancy of Deserialized Streams
  • Seventh Channel has Single Pin Monitor Output That Reflects Input From Seventh Channel Input
  • Parallel Clock Rate up to 40MHz
  • On Chip Filtering for PLL
  • Absolute Maximum Worst Case Power Dissipation = 1.9W at 3.6V
  • High Impedance Inputs Upon Power Off (Vcc = 0V)
  • Single Power Supply at +3.3V
  • 196-pin NFBGA Package (Low-profile Ball Grid Array) Package
  • Industrial Temperature Range Operation: −40°C to +85°C

All trademarks are the property of their respective owners.

  • Deserializes One to Six BusLVDS Input Serial Data Streams with Embedded Clocks
  • Seven Selectable Serial Inputs to Support n+1 Redundancy of Deserialized Streams
  • Seventh Channel has Single Pin Monitor Output That Reflects Input From Seventh Channel Input
  • Parallel Clock Rate up to 40MHz
  • On Chip Filtering for PLL
  • Absolute Maximum Worst Case Power Dissipation = 1.9W at 3.6V
  • High Impedance Inputs Upon Power Off (Vcc = 0V)
  • Single Power Supply at +3.3V
  • 196-pin NFBGA Package (Low-profile Ball Grid Array) Package
  • Industrial Temperature Range Operation: −40°C to +85°C

All trademarks are the property of their respective owners.

The DS92LV1260 integrates six deserializer devices into a single chip. The chip uses a 0.25u CMOS process technology. The DS92LV1260 can simultaneously deserialize up to six data streams that have been serialized by the Texas Instruments DS92LV1021 or DS92LV1023 Bus LVDS serializers. The device also includes a seventh serial input channel that serves as a redundant input.

Each deserializer block in the DS92LV1260 operates independently with its own clock recovery circuitry and lock-detect signaling.

The DS92LV1260 uses a single +3.3V power supply with a typical power dissipation of 1.2W at 3.3V with a PRBS-15 pattern. Refer to the Connection Diagrams for packaging information.

The DS92LV1260 integrates six deserializer devices into a single chip. The chip uses a 0.25u CMOS process technology. The DS92LV1260 can simultaneously deserialize up to six data streams that have been serialized by the Texas Instruments DS92LV1021 or DS92LV1023 Bus LVDS serializers. The device also includes a seventh serial input channel that serves as a redundant input.

Each deserializer block in the DS92LV1260 operates independently with its own clock recovery circuitry and lock-detect signaling.

The DS92LV1260 uses a single +3.3V power supply with a typical power dissipation of 1.2W at 3.3V with a PRBS-15 pattern. Refer to the Connection Diagrams for packaging information.
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类型 标题 下载最新的英语版本 日期
* 数据表 DS92LV1260 Six Channel 10 Bit BLVDS Deserializer 数据表 (Rev. F) 2013年 4月 16日
应用手册 How to Validate BLVDS SER/DES Signal Integrity Using an Eye Mask (Rev. A) 2013年 4月 26日

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