The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.
The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs.
The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.
In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.
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Device type |
Protocols |
Number of Tx |
Number of Rx |
Input signal |
Output signal |
Signaling Rate (Mbps) |
ESD HBM (kV) |
Function |
Operating temperature range (C) |
Package Group |
Package size: mm2:W x L (PKG) |
DS90LV032AQML | DS90C031QML | DS90C031QML-SP | DS90C032QML | DS90LV031AQML | DS90LV032AQML-SP |
---|---|---|---|---|---|
Driver | |||||
LVDS | |||||
4 | 4 | 4 | 4 | 4 | 4 |
4 | 4 | 4 | 4 | 4 | 4 |
LVDS | TTL | TTL | LVDS | LVTTL | LVDS |
LVTTL | LVDS | LVDS | TTL | LVDS | LVTTL |
155.5 | 400 | ||||
4.5 | 3.5 | 3.5 | 2 | 6 | 4.5 |
Receiver | Driver | Driver | Receiver | Driver | Receiver |
-55 to 85 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 85 |
CFP | 16 | LCCC | 20 | CFP | 16 | LCCC | 20 | CFP | 16 | CFP | 16 |
See datasheet (CFP) | 20LCCC: 79 mm2: 8.89 x 8.89 (LCCC | 20) | See datasheet (CFP) | 20LCCC: 79 mm2: 8.89 x 8.89 (LCCC | 20) | See datasheet (CFP) | See datasheet (CFP) |
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