DS90LV032A (正在供货)

3V LVDS 四路 CMOS 差动线路接收器

3V LVDS 四路 CMOS 差动线路接收器 - DS90LV032A
数据表
 

备选器件推荐

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  • DS90LV032AQML  -  QML certified for Military and Defense Applications
  • DS90LV032AQML-SP  -  Radiation tolerant, ceramic packaging and qualified for use in Space-based application
  • DS90LV018A  - 器件与被比较器件具有相似功能,但并不功能等效。 

描述

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions.

The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications.

特性

  • >400 Mbps (200 MHz) Switching Rates
  • 0.1-ns Channel-to-Channel Skew (Typical)
  • 0.1-ns Differential Skew (Typical)
  • 3.3-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (40 mW at 3.3 V Static)
  • Interoperable With Existing 5-V LVDS Networks
  • Accepts Small Swing (350 mV Typical) VID
  • Supports Open, Short, and Terminated Input Fail-Safe
  • Compatible With ANSI/TIA/EIA-644
  • Industrial Temperature Operating Range (–40°C to 85°C)
  • Available in SOIC and TSSOP Packaging

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参数 与其它产品相比 缓冲器、驱动器/接收器和交叉点

 
Device Type
Protocols
No. of Tx
No. of Rx
Input Signal
Output Signal
Signaling Rate (Mbps)
ESD HBM (kV)
ICC (Max) (mA)
Function
Operating Temperature Range (C)
Package Group
Package Size: mm2:W x L (PKG)
Pin/Package
DS90LV032A DS90LV012A DS90LV028A DS90LV028AQ-Q1 DS90LV048A SN65LVDS2 SN65LVDS349 SN65LVDS9637
Receiver    Receiver    Receiver    Receiver    Receiver    Receiver    Receiver    Receiver   
LVDS    LVDS    LVDS    LVDS    LVDS    LVDS    LVDS    LVDS   
4    0    0    0    0         
4    1    2    2    4    1    4    2   
LVDS    LVDS    LVDS    LVDS    LVDS    LVDS    CMOS
ECL
LVCMOS
LVDS
LVECL
LVPECL
PECL   
LVDS   
LVTTL    LVTTL    LVTTL    LVTTL    LVTTL    LVTTL    LVTTL    LVTTL   
400    400    400    400    400    400    560    150   
4.5    2    7    8    10    9    15    8   
15    9    9    9    15    8    20    10   
Receiver    Receiver    Receiver    Receiver    Receiver    Receiver    Receiver    Receiver   
-40 to 85    -40 to 85    -40 to 85    -40 to 125    -40 to 85    -40 to 85    -40 to 85    -40 to 85   
SOIC
TSSOP   
SOT-23    SOIC
WSON   
SOIC    SOIC
TSSOP   
SOIC
SOT-23   
TSSOP    MSOP-PowerPAD
SOIC
VSSOP   
16SOIC: 59 mm2: 6 x 9.9(SOIC)
16TSSOP: 32 mm2: 6.4 x 5(TSSOP)   
5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)    8SOIC: 29 mm2: 6 x 4.9(SOIC)
See datasheet (WSON)   
8SOIC: 29 mm2: 6 x 4.9(SOIC)    16SOIC: 59 mm2: 6 x 9.9(SOIC)
16TSSOP: 32 mm2: 6.4 x 5(TSSOP)   
8SOIC: 29 mm2: 6 x 4.9(SOIC)
5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)   
16TSSOP: 32 mm2: 6.4 x 5(TSSOP)    8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)
8SOIC: 29 mm2: 6 x 4.9(SOIC)
8VSSOP: 15 mm2: 4.9 x 3(VSSOP)   
16SOIC
16TSSOP   
5SOT-23    8SOIC
8WSON   
8SOIC    16SOIC
16TSSOP   
5SOT-23
8SOIC   
16TSSOP    8MSOP-PowerPAD
8SOIC
8VSSOP   

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