产品详情

Resolution (Bits) 10 Number of DAC channels 1 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 170 SFDR (dB) 76 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 10 Number of DAC channels 1 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 170 SFDR (dB) 76 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
SOIC (DW) 28 184.37 mm² 17.9 x 10.3 TSSOP (PW) 28 62.08 mm² 9.7 x 6.4
  • SINGLE +5V OR +3V OPERATION
  • HIGH SFDR: 5MHz Output at 100MSPS: 68dBc
  • LOW GLITCH: 3pV-s
  • LOW POWER: 170mW at +5V
  • INTERNAL REFERENCE:
         Optional Ext. Reference
         Adjustable Full-Scale Range
         Multiplying Option
  • APPLICATIONS
    • COMMUNICATION TRANSMIT CHANNELS
           WLL, Cellular Base Station
           Digital Microwave Links
           Cable Modems
    • WAVEFORM GENERATION
           Direct Digital Synthesis (DDS)
           Arbitrary Waveform Generation (ARB)
    • MEDICAL/ULTRASOUND
    • HIGH-SPEED INSTRUMENTATION AND CONTROL
    • VIDEO, DIGITAL TV

  • SINGLE +5V OR +3V OPERATION
  • HIGH SFDR: 5MHz Output at 100MSPS: 68dBc
  • LOW GLITCH: 3pV-s
  • LOW POWER: 170mW at +5V
  • INTERNAL REFERENCE:
         Optional Ext. Reference
         Adjustable Full-Scale Range
         Multiplying Option
  • APPLICATIONS
    • COMMUNICATION TRANSMIT CHANNELS
           WLL, Cellular Base Station
           Digital Microwave Links
           Cable Modems
    • WAVEFORM GENERATION
           Direct Digital Synthesis (DDS)
           Arbitrary Waveform Generation (ARB)
    • MEDICAL/ULTRASOUND
    • HIGH-SPEED INSTRUMENTATION AND CONTROL
    • VIDEO, DIGITAL TV

The DAC900 is a high-speed, Digital-to-Analog Converter (DAC) offering a 10-bit resolution option within the SpeedPlus family of high-performance converters. Featuring pin compatibility among family members, the DAC908, DAC902, and DAC904 provide a component selection option to an 8-, 12-, and 14-bit resolution, respectively. All models within this family of DACs support update rates in excess of 165MSPS with excellent dynamic performance,and are especially suited to fulfill the demands of a variety of applications.

The advanced segmentation architecture of the DAC900 is optimized to provide a high Spurious-Free Dynamic Range (SFDR) for single-tone, as well as for multi-tone signals—essential when used for the transmit signal path of communication systems.

The DAC900 has a high impedance (200k) current output with a nominal range of 20mA and an output compliance of up to 1.25V. The differential outputs allow for both a differential or single-ended analog signal interface. The close matching of the current outputs ensures superior dynamic performance in the differential configuration, which can be implemented with a transformer.

Utilizing a small geometry CMOS process, the monolithic DAC900 can be operated on a wide, single-supply range of +2.7V to +5.5V. Its low power consumption allows for use in portable and battery-operated systems. Further optimization can be realized by lowering the output current with the adjustable full-scale option.

For noncontinuous operation of the DAC900, a power-down mode results in only 45mW of standby power.

The DAC900 comes with an integrated 1.24V bandgap reference and edge-triggered input latches, offering a complete converter solution. Both +3V and +5V CMOS logic families can be interfaced to the DAC900.

The reference structure of the DAC900 allows for additional flexibility by utilizing the on-chip reference, or applying an external reference. The full-scale output current can be adjusted over a span of 2mA to 20mA, with one external resistor, while maintaining the specified dynamic performance.

The DAC900 is available in SO-28 and TSSOP-28 packages.

The DAC900 is a high-speed, Digital-to-Analog Converter (DAC) offering a 10-bit resolution option within the SpeedPlus family of high-performance converters. Featuring pin compatibility among family members, the DAC908, DAC902, and DAC904 provide a component selection option to an 8-, 12-, and 14-bit resolution, respectively. All models within this family of DACs support update rates in excess of 165MSPS with excellent dynamic performance,and are especially suited to fulfill the demands of a variety of applications.

The advanced segmentation architecture of the DAC900 is optimized to provide a high Spurious-Free Dynamic Range (SFDR) for single-tone, as well as for multi-tone signals—essential when used for the transmit signal path of communication systems.

The DAC900 has a high impedance (200k) current output with a nominal range of 20mA and an output compliance of up to 1.25V. The differential outputs allow for both a differential or single-ended analog signal interface. The close matching of the current outputs ensures superior dynamic performance in the differential configuration, which can be implemented with a transformer.

Utilizing a small geometry CMOS process, the monolithic DAC900 can be operated on a wide, single-supply range of +2.7V to +5.5V. Its low power consumption allows for use in portable and battery-operated systems. Further optimization can be realized by lowering the output current with the adjustable full-scale option.

For noncontinuous operation of the DAC900, a power-down mode results in only 45mW of standby power.

The DAC900 comes with an integrated 1.24V bandgap reference and edge-triggered input latches, offering a complete converter solution. Both +3V and +5V CMOS logic families can be interfaced to the DAC900.

The reference structure of the DAC900 allows for additional flexibility by utilizing the on-chip reference, or applying an external reference. The full-scale output current can be adjusted over a span of 2mA to 20mA, with one external resistor, while maintaining the specified dynamic performance.

The DAC900 is available in SO-28 and TSSOP-28 packages.

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类型 标题 下载最新的英语版本 日期
* 数据表 DAC900 10-Bit 165-MSPS Digital-to-Analog Converter 数据表 (Rev. B) 2002年 5月 29日
EVM 用户指南 DAC90x Evaluation Module User's Guide 2017年 8月 8日
应用手册 Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) 2015年 5月 8日
应用手册 High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012年 10月 23日
应用手册 所选封装材料的热学和电学性质 2008年 10月 16日
应用手册 高速数据转换 下载英文版本 2008年 10月 16日
用户指南 DEM-DAC90x: Evaluation Fixture for the DAC900, DAC902, DAC904, DAC908 2000年 9月 27日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

评估板

DAC900EVM — DAC900 10 位、165MSPS 数模转换器 (DAC) 评估模块

DAC900 评估模块 (EVM) 适用于评估 10 位高速
CMOS 接口 DAC900。该 EVM 只需极少的简单外部组件,更大限度地降低了系统成本和功耗。
用户指南: PDF
TI.com 上无现货
仿真模型

DAC900 IBIS Model for 3.3V

SLWC072.ZIP (6 KB) - IBIS Model
仿真模型

DAC900 IBIS Model for 5V

SLWC073.ZIP (5 KB) - IBIS Model
计算工具

MATCHGAIN-CALC — 宽带辅助电流输出 DAC 转 SE 接口:增益和合规电压摆幅的改进匹配

NOTE: Calculator software is available when downloading the application note.
  • Click on "abstract" to view abstract of document.
  • Open the ZIP file to extract the calculator tool.
  • Open the PDF file to view the application note.

High-speed digital-to-analog converters (DACs) most often use a (...)

光绘文件

DAC900 Design File

SBAC225.ZIP (1677 KB)
模拟工具

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PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

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封装 引脚 下载
SOIC (DW) 28 查看选项
TSSOP (PW) 28 查看选项

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

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