ZHCSGR7 September   2017

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 说明 （续）
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power-On-Reset (POR)
      2. 8.3.2  Device Power Up from Battery without Input Source
      3. 8.3.3  Power Up from Input Source
        1. 8.3.3.1 Power Up REGN Regulation
        2. 8.3.3.2 Poor Source Qualification
        3. 8.3.3.3 Input Source Type Detection
          1. 8.3.3.3.1 PSEL Pins Sets Input Current Limit in bq25600C
        4. 8.3.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 8.3.3.5 Converter Power-Up
      4. 8.3.4  Host Mode and Standalone Power Management
        1. 8.3.4.1 Host Mode and Default Mode in bq25600C
      5. 8.3.5  Power Path Management
      6. 8.3.6  Battery Charging Management
        1. 8.3.6.1 Autonomous Charging Cycle
        2. 8.3.6.2 Battery Charging Profile
        3. 8.3.6.3 Charging Termination
        4. 8.3.6.4 Charging Safety Timer
        5. 8.3.6.5 Narrow VDC Architecture
      7. 8.3.7  Shipping Mode
        1. 8.3.7.1 BATFET Disable Mode (Shipping Mode)
        2. 8.3.7.2 BATFET Enable (Exit Shipping Mode)
      8. 8.3.8  Status Outputs (PG, STAT)
        1. 8.3.8.1 Power Good indicator (PG Pin and PG_STAT Bit)
        2. 8.3.8.2 Charging Status indicator (STAT)
        3. 8.3.8.3 Interrupt to Host (INT)
      9. 8.3.9  Protections
        1. 8.3.9.1 Voltage and Current Monitoring in Converter Operation
          1. 8.3.9.1.1 Voltage and Current Monitoring in Buck Mode
            1. 8.3.9.1.1.1 Input Overvoltage (ACOV)
        2. 8.3.9.2 Thermal Regulation and Thermal Shutdown
          1. 8.3.9.2.1 Thermal Protection in Buck Mode
        3. 8.3.9.3 Battery Protection
          1. 8.3.9.3.1 Battery overvoltage Protection (BATOVP)
      10. 8.3.10 Serial interface
        1. 8.3.10.1 Data Validity
        2. 8.3.10.2 START and STOP Conditions
        3. 8.3.10.3 Byte Format
        4. 8.3.10.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.3.10.5 Slave Address and Data Direction Bit
        6. 8.3.10.6 Single Read and Write
        7. 8.3.10.7 Multi-Read and Multi-Write
    4. 8.4 Register Maps
      1. 8.4.1  REG00
      2. 8.4.2  REG01
      3. 8.4.3  REG02
      4. 8.4.4  REG03
      5. 8.4.5  REG04
      6. 8.4.6  REG05
      7. 8.4.7  REG06
      8. 8.4.8  REG07
      9. 8.4.9  REG08
      10. 8.4.10 REG09
      11. 8.4.11 REG0A
      12. 8.4.12 REG0B
  9. 9 Application and Implementation
    1. 9.1 Application information
    2. 9.2 Typical Application Diagram
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 input Capacitor
        3. 9.2.2.3 Output Capacitor
    3. 9.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 社区资源
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9 Application and Implementation

NOTE

information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application information

A typical application consists of the device configured as an I2C controlled parallel charger with a main charger bq25600 to fast charge single cell Li-Ion and Li-polymer batteries used in a wide range of smart phones and other portable devices. bq25600 and bq25660C have different I2C address so that two devices can share the same I2C bus.

9.2 Typical Application Diagram

bq25600C AppD_bq25600C_SLUSD36.gif Figure 19. Parallel Charger Application

9.2.1 Design Requirements

9.2.2 Detailed Design Procedure

9.2.2.1 Inductor Selection

The 1.5-MHz switching frequency allows the use of small inductor and capacitor values to maintain an inductor saturation current higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):

Equation 1. ISAT ≥ ICHG + (1/2) IRIPPLE

The inductor ripple current depends on the input voltage (VVBUS), the duty cycle (D = VBAT/VVBUS), the switching frequency (fS) and the inductance (L).

Equation 2. bq25600C Equation_04_SLUSCJ4.gif

The maximum inductor ripple current occurs when the duty cycle (D) is 0.5 or approximately 0.5. Usually inductor ripple is designed in the range between 20% and 40% maximum charging current as a trade-off between inductor size and efficiency for a practical design.

9.2.2.2 input Capacitor

Design input capacitance to provide enough ripple current rating to absorb input switching ripple current. The worst case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst case capacitor RMS current ICin occurs where the duty cycle is closest to 50% and can be estimated using Equation 3.

Equation 3. bq25600C Equation_05_SLUSCJ4.gif

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be placed to the drain of the high-side MOSFET and source of the low-side MOSFET as close as possible. Voltage rating of the capacitor must be higher than normal input voltage level. A rating of 25-V or higher capacitor is preferred for 15 V input voltage. Capacitance of 22-μF is suggested for typical of 3A charging current.

9.2.2.3 Output Capacitor

Ensure that the output capacitance has enough ripple current rating to absorb the output switching ripple current. Equation 4 shows the output capacitor RMS current ICOUT calculation.

Equation 4. bq25600C Equation_06_SLUSCJ4.gif

The output capacitor voltage ripple can be calculated as follows:

Equation 5. bq25600C Equation_07_SLUSCJ4.gif

At certain input and output voltage and switching frequency, the voltage ripple can be reduced by increasing the output filter LC.

The charger device has internal loop compensation optimized for >20μF ceramic output capacitance. The preferred ceramic capacitor is 10V rating, X7R or X5R.

9.3 Application Curves

bq25600C wave01_slusck5.png
VVBUS = 5 V VVBAT = 3.2 V
Figure 20. Power-Up with Charge Disabled
bq25600C wave_16_slusck5.png
VVBUS = 5 V
ISYS = 50 mA Charge Disabled
Figure 22. PFM Switching in Buck Mode
bq25600C wave04_slusck5.png
VVBUS = 12 V
ISYS = 50 mA Charge Disabled
Figure 24. PFM Switching in Buck Mode
bq25600C wave06_slusck5.png
VVBUS = 12 V VVBAT = 3.8 V
ICHG = 2 A
Figure 26. PWM Switching in Buck mode
bq25600C wave08_slusck5.png
VVBUS = 5 V VVBAT = 3.2 V
ICHG = 2 A
Figure 28. Charge Disable
bq25600C wave02_slusck5.png
VVBUS = 5 V VVBAT = 3.2 V
ICHG = 2 A
Figure 21. Power-Up with Charge Enabled
bq25600C wave03_slusck5.png
VVBUS = 9 V
ISYS = 50 mA Charge Disabled
Figure 23. PFM Switching in Buck Mode
bq25600C wave05_slusck5.png
VVBUS = 5 V VVBAT = 3.8 V
ICHG = 2 A
Figure 25. PWM Switching in Buck Mode
bq25600C wave21_slusck5.png
VVBUS = 5 V VVBAT = 3.2 V
ICHG = 2 A
Figure 27. Charge Enable