ZHCSES2H December 2009  – February 2016 ADS1282-HT

PRODUCTION DATA. 

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. 说明 (续)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Recommended Operating Conditions
    3. 7.3 Thermal Information
    4. 7.4 Electrical Characteristics
    5. 7.5 Electrical Characteristics (PW Package)
    6. 7.6 Timing Requirements
    7. 7.7 Pulse-Sync Timing Requirements
    8. 7.8 Reset Timing Requirements
    9. 7.9 Switching Characteristics
    10. 7.10Modulator Switching Characteristics
    11. 7.11Typical Characteristics
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1 Noise Performance
      2. 8.3.2 Input-Referred Noise
      3. 8.3.3 Idle Tones
      4. 8.3.4 Operating Mode
      5. 8.3.5 Analog Inputs and Multiplexer
      6. 8.3.6 PGA (Programmable Gain Amplifier)
      7. 8.3.7 ADC
      8. 8.3.8 Modulator
      9. 8.3.9 Modulator Over-Range
      10. 8.3.10Modulator Input Impedance
      11. 8.3.11Modulator Over-Range Detection (MFLAG)
      12. 8.3.12Voltage Reference Inputs (VREFP, VREFN)
      13. 8.3.13 Digital Filter
        1. 8.3.13.1Sinc Filter Stage (Sinx/X)
        2. 8.3.13.2FIR Stage
        3. 8.3.13.3Group Delay and Step Response
          1. 8.3.13.3.1Linear Phase Response
          2. 8.3.13.3.2Minimum Phase Response
        4. 8.3.13.4HPF Stage
      14. 8.3.14Master Clock Input (CLK)
      15. 8.3.15Synchronization (SYNC Pin and Sync Command)
      16. 8.3.16Pulse-Sync Mode
      17. 8.3.17Continuous-Sync Mode
      18. 8.3.18Reset (RESET Pin and Reset Command)
      19. 8.3.19Power-Down (PWDN Pin and Standby Command)
      20. 8.3.20Power-On Sequence
      21. 8.3.21Serial Interface
        1. 8.3.21.1Serial Clock (SCLK)
        2. 8.3.21.2Data Input (DIN)
        3. 8.3.21.3Data Output (DOUT)
        4. 8.3.21.4Data Ready (DRDY)
      22. 8.3.22Data Format
      23. 8.3.23Reading Data
        1. 8.3.23.1Read Data Continuous
        2. 8.3.23.2Read Data by Command
      24. 8.3.24One-Shot Operation
    4. 8.4Device Functional Modes
      1. 8.4.1Modulator Output Mode
    5. 8.5Programming
      1. 8.5.1Commands
        1. 8.5.1.1 WAKEUP: Wake-Up from Standby Mode
        2. 8.5.1.2 STANDBY: Standby Mode
        3. 8.5.1.3 SYNC: Synchronize the A/D Conversion
        4. 8.5.1.4 RESET: Reset the Device
        5. 8.5.1.5 RDATAC: Read Data Continuous
        6. 8.5.1.6 SDATAC: Stop Read Data Continuous
        7. 8.5.1.7 RDATA: Read Data By Command
        8. 8.5.1.8 RREG: Read Register Data
        9. 8.5.1.9 WREG: Write to Register
        10. 8.5.1.10OFSCAL: Offset Calibration
        11. 8.5.1.11GANCAL: Gain Calibration
      2. 8.5.2Calibration Commands
        1. 8.5.2.1OFSCAL Command
        2. 8.5.2.2GANCAL Command
      3. 8.5.3User Calibration
      4. 8.5.4Configuration Guide
    6. 8.6Register Maps
      1. 8.6.1ADS1282-HT Register Map Information
      2. 8.6.2ID Register
      3. 8.6.3Configuration Registers
        1. 8.6.3.1Configuration Register 0
        2. 8.6.3.2Configuration Register 1
      4. 8.6.4HPF1 and HPF0
        1. 8.6.4.1High-Pass Filter Corner Frequency, Low Byte
        2. 8.6.4.2High-Pass Filter Corner Frequency, High Byte
      5. 8.6.5OFC2, OFC1, OFC0
        1. 8.6.5.1Offset Calibration, Low Byte
        2. 8.6.5.2Offset Calibration, Mid Byte
        3. 8.6.5.3Offset Calibration, High Byte
      6. 8.6.6FSC2, FSC1, FSC0
        1. 8.6.6.1Full-Scale Calibration, Low Byte
        2. 8.6.6.2Full-Scale Calibration, Mid Byte
        3. 8.6.6.3Full-Scale Calibration, High Byte
      7. 8.6.7Offset and Full-Scale Calibration Registers
        1. 8.6.7.1OFC[2:0] Registers
        2. 8.6.7.2FSC[2:0] Registers
  9. Application and Implementation
    1. 9.1Application Information
    2. 9.2Typical Application
      1. 9.2.1Geophone Interface Typical Application
        1. 9.2.1.1Detailed Design Procedure
      2. 9.2.2Digital Connection to a Field Programmable Gate Array (FPGA) Device Typical Application
        1. 9.2.2.1Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11器件和文档支持
    1. 11.1器件支持
      1. 11.1.1HPF 传递函数
    2. 11.2社区资源
    3. 11.3商标
    4. 11.4静电放电警告
    5. 11.5Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
订购信息

1 特性

  • 高分辨率:124dB 信噪比 (SNR) (1000SPS)
  • 高精度:总谐波失真 (THD):–102dB
    积分非线性 (INL):0.5ppm
  • 低噪声可编程增益放大器 (PGA)
  • 双通道输入多路复用器 (MUX)
  • 固有稳定性的调制器,支持快速响应超范围检测
  • 灵活的数字滤波器:
    • 正弦 + 有限脉冲响应 (FIR) + 无限脉冲响应 (IIR)(可选)
    • 线性或最小相位响应
    • 可编程的高通滤波器
    • 可选的 FIR 数据速率: 250SPS 至 4kSPS
  • 滤波器旁路选项
  • 低功耗:25mW (210°C)
  • 偏移和增益校准引擎
  • SYNC 输入
  • 模拟电源:单极 (5V) 或双极 (±2.5V)
  • 数字电源:1.75V 至 3.3V
  • 支持极端温度 应用 (1)
    • 可控基线
    • 一个组装/测试场所
    • 一个制造场所
    • 在极端(–55°C 至 210°C)温度范围内可用
    • 延长的产品生命周期
    • 延长产品的变更通知
    • 产品可追溯性
(1)
(1)德州仪器 (TI) 高温产品利用高度优化的硅(芯片)解决方案,通过设计和制造工艺方面的改进,能够在广泛的温度范围内最大限度提升性能。

2 应用

  • 能量勘探
  • 地震监测
  • 高精度仪器
  • 潜孔打钻
  • 高温环境

3 说明

ADS1282-HT 器件是一款超高性能的单芯片模数转换器 (ADC),具有集成式低噪声可编程增益放大器 (PGA) 和双通道输入多路复用器 (MUX)。ADS1282-HT 器件适用于能量勘探和地震监测等应用的苛刻环境。

器件信息(1)

器件型号封装封装尺寸(标称值)
ADS1282-HTCDIP SB (28)7.49mm x 35.56mm
TSSOP (28)4.40mm x 9.70mm
  1. 要了解所有可用封装,请见数据表末尾的可订购产品附录。

简化电路原理图

ADS1282-HT fbd_bas418.gif