SBAS815A February 2017  – June 2017 ADS114S06 , ADS114S08

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Family Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1Absolute Maximum Ratings
    2. 7.2ESD Ratings
    3. 7.3Recommended Operating Conditions
    4. 7.4Thermal Information
    5. 7.5Electrical Characteristics
    6. 7.6Timing Characteristics
    7. 7.7Switching Characteristics
    8. 7.8Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1Noise Performance
  9. Detailed Description
    1. 9.1Overview
    2. 9.2Functional Block Diagram
    3. 9.3Feature Description
      1. 9.3.1 Multiplexer
      2. 9.3.2 Low-Noise Programmable Gain Amplifier
        1. 9.3.2.1PGA Input-Voltage Requirements
        2. 9.3.2.2PGA Rail Flags
        3. 9.3.2.3Bypassing the PGA
      3. 9.3.3 Voltage Reference
        1. 9.3.3.1Internal Reference
        2. 9.3.3.2External Reference
        3. 9.3.3.3Reference Buffers
      4. 9.3.4 Clock Source
      5. 9.3.5 Delta-Sigma Modulator
      6. 9.3.6 Digital Filter
        1. 9.3.6.1Low-Latency Filter
          1. 9.3.6.1.1Low-Latency Filter Frequency Response
          2. 9.3.6.1.2Data Conversion Time for the Low-Latency Filter
        2. 9.3.6.2Sinc3 Filter
          1. 9.3.6.2.1Sinc3 Filter Frequency Response
          2. 9.3.6.2.2Data Conversion Time for the Sinc3 Filter
        3. 9.3.6.3Note on Conversion Time
        4. 9.3.6.450-Hz and 60-Hz Line Cycle Rejection
        5. 9.3.6.5Global Chop Mode
      7. 9.3.7 Excitation Current Sources (IDACs)
      8. 9.3.8 Bias Voltage Generation
      9. 9.3.9 System Monitor
        1. 9.3.9.1Internal Temperature Sensor
        2. 9.3.9.2Power Supply Monitors
        3. 9.3.9.3Burn-Out Current Sources
      10. 9.3.10Status Register
        1. 9.3.10.1POR Flag
        2. 9.3.10.2RDY Flag
        3. 9.3.10.3PGA Output Voltage Rail Monitors
        4. 9.3.10.4Reference Monitor
      11. 9.3.11General-Purpose Inputs and Outputs (GPIOs)
      12. 9.3.12Low-Side Power Switch
      13. 9.3.13Cyclic Redundancy Check (CRC)
      14. 9.3.14Calibration
        1. 9.3.14.1Offset Calibration
        2. 9.3.14.2Gain Calibration
    4. 9.4Device Functional Modes
      1. 9.4.1Reset
        1. 9.4.1.1Power-On Reset
        2. 9.4.1.2RESET Pin
        3. 9.4.1.3Reset by Command
      2. 9.4.2Power-Down Mode
      3. 9.4.3Standby Mode
      4. 9.4.4Conversion Modes
        1. 9.4.4.1Continuous Conversion Mode
        2. 9.4.4.2Single-Shot Conversion Mode
        3. 9.4.4.3Programmable Conversion Delay
    5. 9.5Programming
      1. 9.5.1Serial Interface
        1. 9.5.1.1Chip Select (CS)
        2. 9.5.1.2Serial Clock (SCLK)
        3. 9.5.1.3Serial Data Input (DIN)
        4. 9.5.1.4Serial Data Output and Data Ready (DOUT/DRDY)
        5. 9.5.1.5Data Ready (DRDY)
        6. 9.5.1.6Timeout
      2. 9.5.2Data Format
      3. 9.5.3Commands
        1. 9.5.3.1 NOP
        2. 9.5.3.2 WAKEUP
        3. 9.5.3.3 POWERDOWN
        4. 9.5.3.4 RESET
        5. 9.5.3.5 START
        6. 9.5.3.6 STOP
        7. 9.5.3.7 SYOCAL
        8. 9.5.3.8 SYGCAL
        9. 9.5.3.9 SFOCAL
        10. 9.5.3.10RDATA
        11. 9.5.3.11RREG
        12. 9.5.3.12WREG
      4. 9.5.4Reading Data
        1. 9.5.4.1Read Data Direct
        2. 9.5.4.2Read Data by RDATA Command
        3. 9.5.4.3Sending Commands When Reading Data
      5. 9.5.5Interfacing with Multiple Devices
    6. 9.6Register Map
      1. 9.6.1Configuration Registers
        1. 9.6.1.1 Device ID Register (address = 00h) [reset = xxh]
        2. 9.6.1.2 Device Status Register (address = 01h) [reset = 80h]
        3. 9.6.1.3 Input Multiplexer Register (address = 02h) [reset = 01h]
        4. 9.6.1.4 Gain Setting Register (address = 03h) [reset = 00h]
        5. 9.6.1.5 Data Rate Register (address = 04h) [reset = 14h]
        6. 9.6.1.6 Reference Control Register (address = 05h) [reset = 10h]
        7. 9.6.1.7 Excitation Current Register 1 (address = 06h) [reset = 00h]
        8. 9.6.1.8 Excitation Current Register 2 (address = 07h) [reset = FFh]
        9. 9.6.1.9 Sensor Biasing Register (address = 08h) [reset = 00h]
        10. 9.6.1.10System Control Register (address = 09h) [reset = 10h]
        11. 9.6.1.11Reserved Register (address = 0Ah) [reset = 00h]
        12. 9.6.1.12Offset Calibration Register 1 (address = 0Bh) [reset = 00h]
        13. 9.6.1.13Offset Calibration Register 2 (address = 0Ch) [reset = 00h]
        14. 9.6.1.14Reserved Register (address = 0Dh) [reset = 00h]
        15. 9.6.1.15Gain Calibration Register 1 (address = 0Eh) [reset = 00h]
        16. 9.6.1.16Gain Calibration Register 2 (address = 0Fh) [reset = 40h]
        17. 9.6.1.17GPIO Data Register (address = 10h) [reset = 00h]
        18. 9.6.1.18GPIO Configuration Register (address = 11h) [reset = 00h]
  10. 10Application and Implementation
    1. 10.1Application Information
      1. 10.1.1Serial Interface Connections
      2. 10.1.2Analog Input Filtering
      3. 10.1.3External Reference and Ratiometric Measurements
      4. 10.1.4Establishing a Proper Input Voltage
      5. 10.1.5Unused Inputs and Outputs
      6. 10.1.6Pseudo Code Example
    2. 10.2Typical Application
      1. 10.2.1Design Requirements
      2. 10.2.2Detailed Design Procedure
        1. 10.2.2.1Register Settings
      3. 10.2.3Application Curves
    3. 10.3Do's and Don'ts
  11. 11Power Supply Recommendations
    1. 11.1Power Supplies
    2. 11.2Power-Supply Sequencing
    3. 11.3Power-On Reset
    4. 11.4Power-Supply Decoupling
  12. 12Layout
    1. 12.1Layout Guidelines
    2. 12.2Layout Example
  13. 13Device and Documentation Support
    1. 13.1Device Support
      1. 13.1.1Development Support
    2. 13.2Documentation Support
      1. 13.2.1Related Documentation
    3. 13.3Related Links
    4. 13.4Receiving Notification of Documentation Updates
    5. 13.5Community Resources
    6. 13.6Trademarks
    7. 13.7Electrostatic Discharge Caution
    8. 13.8Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Features

  • Low Power Consumption: As Low as 280 µA
  • Programmable Gain: 1 to 128
  • Programmable Data Rates: 2.5 SPS to 4 kSPS
  • Simultaneous 50-Hz and 60-Hz Rejection at
    ≤ 20 SPS with Low-Latency Digital Filter
  • Analog Multiplexer with 12 (ADS114S08) or 6 (ADS114S06) Independently Selectable Inputs
  • Dual-Matched Programmable Current Sources for Sensor Excitation: 10 µA to 2000 µA
  • Internal Reference: 2.5 V, 10 ppm/°C (max) Drift
  • Internal Oscillator: 4.096 MHz, 1.5% Accuracy
  • Internal Temperature Sensor
  • Extended Fault Detection Circuits
  • Self Offset and System Calibration
  • Four General-Purpose I/Os
  • SPI-Compatible Interface with Optional CRC
  • Analog Supply: Unipolar (2.7 V to 5.25 V) or Bipolar (±2.5 V)
  • Digital Supply: 2.7 V to 3.6 V
  • Operating Temperature: –50°C to +125°C

Applications

  • Sensor Transducers and Transmitters:
    Temperature, Pressure, Strain, Flow
  • PLC and DCS Analog Input Modules
  • Temperature Controllers
  • Climate Chambers, Industrial Ovens

Description

The ADS114S06 and ADS114S08 are precision, 16-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs) that offer low power consumption and many integrated features to reduce system cost and component count in applications measuring small-signal sensors.

These ADCs feature configurable digital filters that offer low-latency conversion results and 50-Hz or
60-Hz rejection for noisy industrial environments. A low-noise, programmable gain amplifier (PGA) provides gains ranging from 1 to 128 to amplify low-level signals for resistive bridge or thermocouple applications. Additionally, these devices integrate a low-drift, 2.5-V reference that reduces printed circuit board (PCB) area. Finally, two programmable excitation current sources (IDACs) allow for easy and accurate RTD biasing.

An input multiplexer supports 12 inputs for the ADS114S08 and six inputs for the ADS114S06 that can be connected to the ADC in any combination for design flexibility. In addition, these devices include features such as sensor burn-out detection, voltage bias for thermocouples, system monitoring, and four general-purpose I/Os.

The devices are offered in a leadless VQFN-32 or a TQFP-32 package.

Device Information

ORDER NUMBERPACKAGE (PIN)BODY SIZE
ADS114S0xTQFP (32)5.0 mm × 5.0 mm
VQFN (32)5.0 mm × 5.0 mm

Functional Block Diagram

ADS114S06 ADS114S08 ai_fbd_sbas815.gif