产品详情

Sample rate (max) (Msps) 66 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS, TTL Analog input BW (MHz) 450 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 357 Architecture Pipeline SNR (dB) 66 ENOB (bit) 10.7 SFDR (dB) 80 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 66 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS, TTL Analog input BW (MHz) 450 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 357 Architecture Pipeline SNR (dB) 66 ENOB (bit) 10.7 SFDR (dB) 80 Operating temperature range (°C) -40 to 85 Input buffer No
LQFP (NEY) 32 81 mm² 9 x 9
  • Single Supply Operation
  • Low Power Consumption
  • Power Down Mode
  • On-Chip Reference Buffer

Key Specifications

  • Resolution: 12 Bits
  • Conversion Rate: 66 Msps
  • Full Power Bandwidth: 450 MHz
  • DNL: ±0.4 LSB (typ)
  • SNR (fIN = 10 MHz): 66 dB (typ)
  • SFDR (fIN = 10 MHz): 80 dB (typ)
  • Data Latency: 6 Clock Cycles
  • Supply Voltage: +3.3V ± 300 mV
  • Power Consumption, 66 MHz: 357 mW (typ)

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments.

  • Single Supply Operation
  • Low Power Consumption
  • Power Down Mode
  • On-Chip Reference Buffer

Key Specifications

  • Resolution: 12 Bits
  • Conversion Rate: 66 Msps
  • Full Power Bandwidth: 450 MHz
  • DNL: ±0.4 LSB (typ)
  • SNR (fIN = 10 MHz): 66 dB (typ)
  • SFDR (fIN = 10 MHz): 80 dB (typ)
  • Data Latency: 6 Clock Cycles
  • Supply Voltage: +3.3V ± 300 mV
  • Power Consumption, 66 MHz: 357 mW (typ)

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments.

The ADC12L066 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 66 Megasamples per second (Msps), minimum, with typical operation possible up to 80 Msps. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 450 MHz. Operating on a single 3.3V power supply, this device consumes just 357 mW at 66 Msps, including the reference current. The Power Down feature reduces power consumption to just 50 mW.

The differential inputs provide a full scale input swing equal to ±VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.

This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to facilitate the evaluation process.

The ADC12L066 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 66 Megasamples per second (Msps), minimum, with typical operation possible up to 80 Msps. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 450 MHz. Operating on a single 3.3V power supply, this device consumes just 357 mW at 66 Msps, including the reference current. The Power Down feature reduces power consumption to just 50 mW.

The differential inputs provide a full scale input swing equal to ±VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.

This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to facilitate the evaluation process.

下载 观看带字幕的视频 视频

技术文档

star =有关此产品的 TI 精选热门文档
未找到结果。请清除搜索并重试。
查看全部 1
类型 标题 下载最新的英语版本 日期
* 数据表 ADC12L066 12-Bit, 66 MSPS, 450 MHz Bandwidth ADC w/Internal Sample-and-Hold 数据表 (Rev. I) 2013年 3月 14日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

模拟工具

PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
封装 引脚 下载
LQFP (NEY) 32 查看选项

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

视频