ADC12DJ5200RF 业界最快的双通道 5.2GSPS 或单通道 10.4GSPS 射频采样 12 位 ADC | 德州仪器 TI.com.cn

ADC12DJ5200RF (预发布) 业界最快的双通道 5.2GSPS 或单通道 10.4GSPS 射频采样 12 位 ADC

 

Sample availability

Preproduction samples are available (PADC12DJ5200RFAAV). Order now

描述

The ADC12DJ5200RF device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10 GHz. ADC12DJ5200RF can be configured as a dual-channel, 5.2 GSPS ADC or single-channel, 10.4 GSPS ADC. These operating modes allow programmable tradeoffs in channel count and Nyquist bandwidth allows for flexible hardware that meets the needs of multiple applications. Useable input frequency range of up to 10 GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.

The ADC12DJ5200RF uses a high-speed JESD204C output interface with up to 16 serialized lanes supporting up to 17.16 Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and number of lanes. Both 8B/10B and 64B/66B data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backwards compatible with JESD204B receivers when using 8B/10B encoding modes.

Innovative synchronization features, including noiseless aperture delay (TAD) adjustment and SYSREF windowing, simplify system design for multi-channel applications. Optional digital down converters (DDCs) are available to provide digital conversion to baseband and to reduce the interface rate.

特性

  • ADC core:
    • 12-bit resolution
    • Up to 10.4 GSPS in single-channel mode
    • Up to 5.2 GSPS in dual-channel mode
  • Performance specifications:
    • Noise floor (–20 dBFS, VFS = 1.0 VPP-DIFF):
      • Dual-channel mode: –151.8 dBFS/Hz
      • Single-channel mode: –154.4 dBFS/Hz
    • ENOB (dual channel, FIN = 2.4 GHz): 8.6 Bits
  • Buffered analog inputs with VCMI of 0 V:
    • Analog input bandwidth (–3 dB): 8.0 GHz
    • Usable input frequency range: > 10 GHz
    • Full-scale input voltage (VFS, default): 0.8 VPP
  • Noiseless aperture delay (TAD) adjustment:
    • Precise sampling control: 19-fs Step
    • Simplifies synchronization and interleaving
    • Temperature and voltage invariant delays
  • Easy-to-use synchronization features:
    • Automatic SYSREF timing calibration
    • Timestamp for sample marking
  • JESD204C serial data interface:
    • Maximum lane rate: 17.16 Gbps
    • Support for 64B/66B and 8B/10B encoding
    • 8B/10B modes are JESD204B compatible
  • Optional digital down-converters (DDC):
    • 4x and 8x complex decimation
    • Four independent 32-Bit NCOs per DDC
  • Power consumption: 4.0 W
  • Power supplies: 1.1 V, 1.9 V

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参数

与其它产品相比 高速 ADCs (>10MSPS) 邮件 下载到电子表格中
Part number 立即下单 Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
ADC12DJ5200RF 立即下单   Ultra High Speed     12     2
1    
56.7     9     78     4010     0.8     JESD204B
JESD204C    
-40 to 85     8000     Yes     FCBGA | 144     See datasheet (FCBGA)     Military     Folding Interpolating    
ADC12DJ2700 无样片 2700
5400    
Ultra High Speed     12     2
1    
57.7     9     75     2700     0.8     JESD204B     -40 to 85     8000     Yes     FCBGA | 144     See datasheet (FCBGA)     Catalog     Folding Interpolating    
ADC12DJ3200 无样片 3200
6400    
Ultra High Speed     12     2
1    
57.6     9     75     3000     0.8     JESD204B     -40 to 85     8000     Yes     FCBGA | 144     See datasheet (FCBGA)     Catalog     Folding Interpolating