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Resolution (Bits) 12 Sample rate (max) (ksps) 500 Number of input channels 2 Interface type Microwire (Serial I/O), SPI Architecture SAR Input type Differential Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 105 Power consumption (typ) (mW) 11 Analog supply (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 73.2 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
Resolution (Bits) 12 Sample rate (max) (ksps) 500 Number of input channels 2 Interface type Microwire (Serial I/O), SPI Architecture SAR Input type Differential Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 105 Power consumption (typ) (mW) 11 Analog supply (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 73.2 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
VSSOP (DGS) 10 14.7 mm² 3 x 4.9
  • True Simultaneous Sampling Differential Inputs
  • Specified Performance from 200 kSPS to 500 kSPS
  • External Reference
  • Wide Input Common-Mode Voltage Range
  • Single High-Speed Serial Data Output
  • Operating Temperature Range of −40°C to +105°C
  • SPI/QSPI/MICROWIRE/DSP Compatible Serial Interface

Key Specifications

  • Conversion Rate: 200 kSPS to 500 kSPS
  • INL: ±1 LSB (max)
  • DNL: ±0.95 LSB (max)
  • SNR: 71 dBc (min)
  • THD: -72 dBc (min)
  • ENOB: 11.25 bits (min)
  • Power Consumption at 500 kSPS
    • Converting, VA = 5V, VREF = 2.5V: 11 mW (typ)
    • Power-Down, VA = 5V, VREF = 2.5V: 3 µW (typ)

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  • True Simultaneous Sampling Differential Inputs
  • Specified Performance from 200 kSPS to 500 kSPS
  • External Reference
  • Wide Input Common-Mode Voltage Range
  • Single High-Speed Serial Data Output
  • Operating Temperature Range of −40°C to +105°C
  • SPI/QSPI/MICROWIRE/DSP Compatible Serial Interface

Key Specifications

  • Conversion Rate: 200 kSPS to 500 kSPS
  • INL: ±1 LSB (max)
  • DNL: ±0.95 LSB (max)
  • SNR: 71 dBc (min)
  • THD: -72 dBc (min)
  • ENOB: 11.25 bits (min)
  • Power Consumption at 500 kSPS
    • Converting, VA = 5V, VREF = 2.5V: 11 mW (typ)
    • Power-Down, VA = 5V, VREF = 2.5V: 3 µW (typ)

All trademarks are the property of their respective owners.

The ADC122S655 is a dual 12-bit, 200 kSPS to 500 kSPS simultaneous sampling Analog-to-Digital (A/D) converter. The analog inputs on both channels are sampled simultaneously to preserve their relative phase information to each other. The converter is based on a successive-approximation register architecture where the differential nature of the analog inputs is maintained from the internal track-and-hold circuits throughout the A/D converter to provide excellent common-mode signal rejection. The ADC122S655 features an external reference that can be varied from 1.0V to VA.

The ADC122S655's serial data output is binary 2's complement and is compatible with several standards, such as SPI, QSPI, MICROWIRE, and many common DSP serial interfaces. The serial clock (SCLK) and chip select bar (CS) are shared by both channels.

Operating from a single 5V analog supply and a reference voltage of 2.5V, the total power consumption while operating at 500 kSPS is typically 11 mW. With the ADC122S655 operating in power-down mode, the power consumption reduces to 3 µW. The differential input, low power consumption, and small size make the ADC122S655 ideal for direct connection to sensors in motor control applications.

Operation is specified over the industrial temperature range of −40°C to +105°C and clock rates of 6.4 MHz to 16 MHz. The ADC122S655 is available in a 10-lead VSSOP package.

The ADC122S655 is a dual 12-bit, 200 kSPS to 500 kSPS simultaneous sampling Analog-to-Digital (A/D) converter. The analog inputs on both channels are sampled simultaneously to preserve their relative phase information to each other. The converter is based on a successive-approximation register architecture where the differential nature of the analog inputs is maintained from the internal track-and-hold circuits throughout the A/D converter to provide excellent common-mode signal rejection. The ADC122S655 features an external reference that can be varied from 1.0V to VA.

The ADC122S655's serial data output is binary 2's complement and is compatible with several standards, such as SPI, QSPI, MICROWIRE, and many common DSP serial interfaces. The serial clock (SCLK) and chip select bar (CS) are shared by both channels.

Operating from a single 5V analog supply and a reference voltage of 2.5V, the total power consumption while operating at 500 kSPS is typically 11 mW. With the ADC122S655 operating in power-down mode, the power consumption reduces to 3 µW. The differential input, low power consumption, and small size make the ADC122S655 ideal for direct connection to sensors in motor control applications.

Operation is specified over the industrial temperature range of −40°C to +105°C and clock rates of 6.4 MHz to 16 MHz. The ADC122S655 is available in a 10-lead VSSOP package.

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类型 标题 下载最新的英语版本 日期
* 数据表 Dual 12-Bit, 200 kSPS to 500 kSPS, Simultaneous Sampling A/D Converter 数据表 (Rev. A) 2013年 3月 20日
电子书 Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015年 5月 21日
用户指南 ADC122S655 Dual 12Bit, 200kSPS to 500kSPS, Simultaneous Sampling ADC User Guide 2012年 2月 21日

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