SLAZ357J October   2012  – May 2021 MSP430FE427

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  CPU4
    2. 6.2  EEM20
    3. 6.3  ESP1
    4. 6.4  ESP2
    5. 6.5  ESP3
    6. 6.6  ESP4
    7. 6.7  ESP5
    8. 6.8  FLL3
    9. 6.9  MPY2
    10. 6.10 SD1
    11. 6.11 SD2
    12. 6.12 TA12
    13. 6.13 TA16
    14. 6.14 TA21
    15. 6.15 TAB22
    16. 6.16 US15
    17. 6.17 WDG2
  7. 7Revision History

6.3 ESP1

ESP Module

Category

Functional

Function

Suspending the ESP430CE1

Description

Suspending the ESP430 may create an invalid interrupt which can lead to a reset-like behavior of the module.

Workaround

Set the bit 0x08 together with the ESPSUSP bit:
bis.w    #08h+ESPSUSP, &ESPCTL
This bit also must be cleared when the suspend mode is exited.
bic.w    #08h+ESPSUSP, &ESPCTL
NOTE:
- After suspending the ESP430CE1 it can take up to 9 MCLK clock cycles before the CPU can access the SD16 registers.
- An interrupt service routine for the SD16 is required.


// Shut down ESP (set Embedded Signal Processing into
// "Suspend" mode)
// ensure that it is not in measurement or calibration mode,
      ESPCTL |= 0x08 + ESPSUSP;
         // Set ESP into Suspend Mode
         // incl.  Bug Fix for Suspend Mode
// wait 9 clocks until proper access to the SD16 is possible
      __delay_cycles(9);

      MBCTL &= ~(IN0IFG + IN0IE);    
         // Clear any Pending MB interrupt and disable
         // ESP interrupt
      SD16CTL &= ~SD16REFON; // Switch Reference off