SBOS583B December   2011  – December 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Temperature Switch
      2. 7.3.2 Hysteresis Input
      3. 7.3.3 Set-Point Resistor (RSET)
    4. 7.4 Device Functional Modes
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage Supply, VCC –0.3 6 V
Input, SET and HYST –0.3 VCC + 0.3
Output, OT –0.3 6
Current Input 20 mA
Output 20
Temperature Operating, TA –40 125 °C
Junction, TJ 150
Storatge, Tstg –65 150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
Machine model (MM) ±200
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC Supply voltage 2.7 5.5 V
TA Operating temperature 0 125 °C

Thermal Information

THERMAL METRIC(1) TMP709 UNIT
DBV (SOT-23)
5 PINS
RθJA Junction-to-ambient thermal resistance 217.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 86.3 °C/W
RθJB Junction-to-board thermal resistance 44.6 °C/W
ψJT Junction-to-top characterization parameter 4.4 °C/W
ψJB Junction-to-board characterization parameter 43.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Electrical Characteristics

at TA = 0°C to 125°C and VCC = 2.7 V to 5.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
ICC Supply current VCC = 5 V 40 55 µA
VCC = 2.7 V 40 55 µA
TEMPERATURE
TE Temperature error TA = 60°C to 100°C ±0.5 ±3 °C
DIGITAL INPUT (HYST)
VIH High-level input voltage 0.7 × VCC V
VIL Low-level input voltage 0.3 × VCC V
CIN Input capacitance 10 pF
ANALOG INPUT (SET)
VIN Input voltage range 0 VCC V
Ilkg_in Input leakage current 1 µA
DIGITAL OPEN-DRAIN OUTPUT (OT)
I(OT_SINK) Output sink current VOT = 0.3 V 5 12 mA
Ilkg(OT) Output leakage current VOT = VCC 1 µA

Typical Characteristics

at TA = 25°C and VCC = 2.7 V to 5.5 V (unless otherwise noted)
TMP709 tc_is-tmp_bos585.gif
Figure 1. Supply Current vs Temperature
TMP709 tc_hyst-tmp_bos583.gif
Figure 3. Hysteresis vs Trip Temperature
TMP709 tc_rset-tmp_bos585.gif
Figure 2. RSET vs Trip Temperature
TMP709 tc_tmp_err-tmp_bos585.gif
Figure 4. Temperature Error vs Trip Temperature