ZHCSJ20C August 2018 – March 2019 UCC21530-Q1
Figure 42shows a multiple pulses bench test circuit which uses L1 as the inductor load, and a group of control pulses are generated to evaluate driver and SiC MOSFET switching transient under different load conditions. The test conditions are: VDC-Link = 600 V, VCC = 5 V, VDD = 15 V, VSS = –4 V, fSW = 500 kHz, RON = 5.1 Ω, ROFF = 1.0 Ω. Figure 43 shows the turn on and turn off waveforms at around 20 A current
Channel 1 (Yellow): Gate-source voltage signal on the low side MOSFET.
Channel 2 (Blue): Gate-source voltage signal on the high side MOSFET.
Channel 3 (Pink): Drain-source voltage signal for the low side MOSFET.
Channel 4 (Green): Drain-source current signal for the low side MOSFET.
In Figure 43, the gate drive signals on the high and low power transistor have a 100-ns dead time, and both signals are measured with >= 500 MHz bandwidth probes.