SLVSDD9 March   2017 TPS92692 , TPS92692-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Internal Regulator and Undervoltage Lockout (UVLO)
      2. 7.3.2  Oscillator
      3. 7.3.3  Spread Spectrum Frequency Modulation
      4. 7.3.4  Gate Driver
      5. 7.3.5  Rail-to-Rail Current Sense Amplifier
      6. 7.3.6  Transconductance Error Amplifier
      7. 7.3.7  Switch Current Sense
      8. 7.3.8  Slope Compensation
      9. 7.3.9  Analog Adjust Input
      10. 7.3.10 DIM/PWM Input
      11. 7.3.11 Series P-Channel FET Dimming Gate Driver Output
      12. 7.3.12 Soft-Start
      13. 7.3.13 Current Monitor Output
      14. 7.3.14 Output Overvoltage Protection
      15. 7.3.15 Output Short-circuit Protection
      16. 7.3.16 Thermal Protection
      17. 7.3.17 Fault Indicator (FLT)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Hiccup Mode Short-circuit Protection
      2. 7.4.2 Fault Indication Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Duty Cycle Considerations
      2. 8.1.2  Inductor Selection
      3. 8.1.3  Output Capacitor Selection
      4. 8.1.4  Input Capacitor Selection
      5. 8.1.5  Main Power MOSFET Selection
      6. 8.1.6  Rectifier Diode Selection
      7. 8.1.7  LED Current Programming
      8. 8.1.8  Switch Current Sense Resistor
      9. 8.1.9  Slope Compensation
      10. 8.1.10 Feedback Compensation
      11. 8.1.11 Soft-Start
      12. 8.1.12 Overvoltage and Undervoltage Protection
      13. 8.1.13 Analog to PWM Dimming Considerations
      14. 8.1.14 Direct PWM Dimming Considerations
      15. 8.1.15 Series P-Channel MOSFET Selection
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Boost LED Driver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Calculating Duty Cycle
          2. 8.2.1.2.2  Setting Switching Frequency
          3. 8.2.1.2.3  Setting Dither Modulation Frequency
          4. 8.2.1.2.4  Inductor Selection
          5. 8.2.1.2.5  Output Capacitor Selection
          6. 8.2.1.2.6  Input Capacitor Selection
          7. 8.2.1.2.7  Main N-Channel MOSFET Selection
          8. 8.2.1.2.8  Rectifying Diode Selection
          9. 8.2.1.2.9  Programming LED Current
          10. 8.2.1.2.10 Setting Switch Current Limit
          11. 8.2.1.2.11 Programming Slope Compensation
          12. 8.2.1.2.12 Deriving Compensator Parameters
          13. 8.2.1.2.13 Setting Start-up Duration
          14. 8.2.1.2.14 Setting Overvoltage Protection Threshold
          15. 8.2.1.2.15 Analog-to-PWM Dimming Considerations
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Buck-Boost LED Driver
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Calculating Duty Cycle
          2. 8.2.2.2.2  Setting Switching Frequency
          3. 8.2.2.2.3  Setting Dither Modulation Frequency
          4. 8.2.2.2.4  Inductor Selection
          5. 8.2.2.2.5  Output Capacitor Selection
          6. 8.2.2.2.6  Input Capacitor Selection
          7. 8.2.2.2.7  Main N-Channel MOSFET Selection
          8. 8.2.2.2.8  Rectifier Diode Selection
          9. 8.2.2.2.9  Programming LED Current
          10. 8.2.2.2.10 Setting Switch Current Limit and Slope Compensation
          11. 8.2.2.2.11 Programming Slope Compensation
          12. 8.2.2.2.12 Deriving Compensator Parameters
          13. 8.2.2.2.13 Setting Startup Duration
          14. 8.2.2.2.14 Setting Overvoltage Protection Threshold
          15. 8.2.2.2.15 Direct PWM Dimming Consideration
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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订购信息

5 Pin Configuration and Functions

PWP Package
20-Pin HTSSOP with PowerPAD™
Top View
TPS92692 TPS92692-Q1 PinOut_SLVDD9.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
COMP 7 I/O Transconductance error amplifier output. Connect compensation network to achieve desired closed-loop response.
CSN 13 I Current sense amplifier negative input (–). Connect directly to the negative node of LED current sense resistor, RCS.
CSP 14 I Current sense amplifier positive input (+). Connect directly to the positive node of LED current sense resistor, RCS.
DIM/PWM 10 I External analog to PWM dimming command or direct PWM dimming input. The external analog dimming command between 1 V and 3 V is compared to the internal PWM generator triangle waveform to set LED current duty cycle between 0% and 100%. With PWM generator disabled, a direct PWM dimming command can be applied to control the LED current duty cycle and frequency. The analog or PWM command is used to generate an internal PWM signal that controls the GATE and PDRV outputs. Setting the internal PWM signal to logic level low, turns off switching, idles the oscillator, disconnects the COMP pin, and sets PDRV to VCSP. Connect to VREF when not used for PWM dimming.
DM 5 I/O Triangle wave spread spectrum modulation frequency, fm, programming pin. Connect a capacitor to GND to set the spread spectrum modulating frequency. Connect directly to GND to disable spread spectrum modulation of switching frequency.
FLT 3 O Open-drain fault indicator. Connect to VREF with a resistor to create active low fault signal output. Internal LED short circuit protection and auto-restart timer can enabled by directly connecting the pin to SS input.
GATE 19 O N-channel MOSFET gate driver output. Connect to gate of external main switching N-channel MOSFET.
GND 17 — Analog and Power ground connection pin. Connect to circuit ground to complete return path.
IADJ 9 I LED current reference input. Connect this pin to VCC with a 100-kΩ series resistor to set the internal reference voltage to 2.42 V and the current sense threshold, V(CSP-CSN) to 170.7 mV. The pin can be modulated by an external voltage source from 140 mV to 2.25 V to implement analog dimming.
IMON 8 O LED current report pin. The LED current sensed by CSP/CSN input is reported as VIMON = 14 × ILED × RCS. Bypass with a 1-nF ceramic capacitor connected to GND.
IS 18 I Switch current sense input. Connect to the switch sense resistor, RIS to set the switch current limit threshold based on the internal 250 mV reference.
OV 15 I Output voltage input. Connect a resistor divider from output voltage to GND to set output overvoltage and under-voltage protection thresholds.
PDRV 12 O Series dimming P-channel FET gate driver output. Connect to gate of external P-channel MOSFET to implement series FET PWM dimming and fault disconnect.
RAMP 11 I/O Programming input for internal PWM generator. Connect a capacitor to GND to set the triangle wave frequency for PWM generator circuit. Connect a 249-kΩ resistor to GND to disable the PWM generator and to set a fixed reference for direct external PWM dimming input. Do not allow this pin to float.
RT 6 I/O Oscillator frequency programming pin. Connect a resistor to GND to set the switching frequency. The internal oscillator can be synchronized by coupling an external clock pulse through a series capacitor with a value of 100 nF.
SLOPE 16 I/O Slope compensation input. Connect a resistor to GND to set the desired slope compensation ramp based on inductor value, input and output voltages.
SS 4 I/O Soft-start programming pin. Connect a capacitor to GND to extend the start-up time. Switching can be disabled by shorting this pin to GND.
VCC 20 — VCC (7.5 V) bias supply pin. Locally decouple to GND using a ceramic capacitor (with a value between 2.2-µF and 4.7-µF). Locate close to the controller.
VIN 1 — Input supply for the internal regulators. Bypass with a low-pass filter using a series 10-Ω resistor and 10- nF capacitor connected to GND. Locate the capacitor close to the controller.
VREF 2 — VREF (5 V) bias supply pin. Locally decouple to GND using a ceramic capacitor (with a value between 2.2-µF and 4.7-µF) located close to the controller.
Thermal Pad — The GND pin must be connected to the exposed thermal pad for proper operation. This PowerPAD must be connected to PCB ground plane using multiple vias for good thermal performance.