ZHCSHU2B March   2018  – October 2018 TPS7A10

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      压降与 IOUT 和温度间的关系（YKA 封装）
      2.      典型应用电路
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excellent Transient Response
      2. 7.3.2 Global Undervoltage Lockout (UVLO)
      3. 7.3.3 Active Discharge
      4. 7.3.4 Enable
      5. 7.3.5 Sequencing Requirement
      6. 7.3.6 Internal Foldback Current Limit
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disable Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Load Transient Response
      4. 8.1.4 Dropout Voltage
      5. 8.1.5 Behavior During Transition From Dropout Into Regulation
      6. 8.1.6 Undervoltage Lockout Circuit Operation
      7. 8.1.7 Power Dissipation (PD)
        1. 8.1.7.1 Estimating Junction Temperature
        2. 8.1.7.2 Recommended Area for Continuous Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Current
        2. 8.2.2.2 Thermal Dissipation
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 评估模块
        2. 11.1.1.2 Spice 模型
      2. 11.1.2 器件命名规则
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 术语表
  12. 12机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DSE|6
  • YKA|5
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.3.6 Internal Foldback Current Limit

The internal foldback current limit circuit is used to protect the LDO against high-load current faults or shorting events. The foldback mechanism lowers the current limit as the output voltage decreases, and limits power dissipation during short-circuit events while still allowing for the device to operate at the rated output current; see Figure 15.

For example, when VOUT is 90% of VOUT(nom), the current limit is ICL (typical); however, if VOUT is forced to 0 V, the current limit is ISC (typical).

In many LDOs, the foldback current limit can prevent start up into a constant-current load or a negatively-biased output. A brick-wall current limit is when there is an abrupt current stop after the current limit is reached. The foldback mechanism for this device goes into a brick-wall current limit when VOUT > 500 mV (typical), thus limiting current to ICL (typical). When VOUT is approximately 0 V, current is limited to ISC (typical) in order to provide normal start up into a variety of loads.

Thermal shutdown can activate during a current-limit event because of the high power dissipation typically found in these conditions. To provide proper operation of the current limit, minimize the inductances to the input and load. Continuous operation in current limit is not recommended.