The devices include one serial communications interface (SCI) module (SCI-A). The SCI module supports digital communications between the CPU and other asynchronous peripherals that use the standard nonreturn-to-zero (NRZ) format. The SCI receiver and transmitter are double-buffered, and each has its own separate enable and interrupt bits. Both can be operated independently or simultaneously in the full-duplex mode. To ensure data integrity, the SCI checks received data for break detection, parity, overrun, and framing errors. The bit rate is programmable to over 65000 different speeds through a 16-bit baud-select register.
Features of each SCI module include:
Both pins can be used as GPIO if not used for SCI.
All registers in this module are 8-bit registers that are connected to Peripheral Frame 2. When a register is accessed, the register data is in the lower byte (7–0), and the upper byte (15–8) is read as zeros. Writing to the upper byte has no effect.
The SCI port operation is configured and controlled by the registers listed in Table 6-41.
|NAME||ADDRESS||SIZE (x16)||EALLOW PROTECTED||DESCRIPTION|
|SCICCRA||0x7050||1||No||SCI-A Communications Control Register|
|SCICTL1A||0x7051||1||No||SCI-A Control Register 1|
|SCIHBAUDA||0x7052||1||No||SCI-A Baud Register, High Bits|
|SCILBAUDA||0x7053||1||No||SCI-A Baud Register, Low Bits|
|SCICTL2A||0x7054||1||No||SCI-A Control Register 2|
|SCIRXSTA||0x7055||1||No||SCI-A Receive Status Register|
|SCIRXEMUA||0x7056||1||No||SCI-A Receive Emulation Data Buffer Register|
|SCIRXBUFA||0x7057||1||No||SCI-A Receive Data Buffer Register|
|SCITXBUFA||0x7059||1||No||SCI-A Transmit Data Buffer Register|
|SCIFFTXA(2)||0x705A||1||No||SCI-A FIFO Transmit Register|
|SCIFFRXA(2)||0x705B||1||No||SCI-A FIFO Receive Register|
|SCIFFCTA(2)||0x705C||1||No||SCI-A FIFO Control Register|
|SCIPRIA||0x705F||1||No||SCI-A Priority Control Register|
For more information on the SCI, see the Serial Communications Interface (SCI) chapter in the TMS320F2803x Piccolo Technical Reference Manual.
Figure 6-33 shows the SCI module block diagram.