13.1 Layout Guidelines
Each system design and PCB layout is unique. The layout should be carefully reviewed in the context of a specific PCB design. However, the following guidelines can optimize TLV320AIC3262 performance:
- The decoupling capacitors for the power supplies should be placed close to the device pins. Figure 33 shows the recommended decoupling capacitors for the TLV320AIC3262.
- Place the flying capacitor between CPFCP and CPFCM near the device pins, with minimal VIAS in the trace between the device pins and the capacitor. Similarly, keep the decoupling capacitor on VNEG near the device pin with minimal VIAS in the trace between the device terminal, capacitor and PCB ground.
- TLV320AIC3262 internal voltage references must be filtered using external capacitors. Place the filter capacitors on VREF_SAR and VREF_AUDIO near the device pins for optimal performance.
- For analog differential audio signals, the signals should be routed differentially on the PCB for better noise immunity. Avoid crossing of digital and analog signals to avoid undesirable crosstalk.
- Analog, speaker and digital grounds should be separated to prevent possible digital noise from affecting the analog performance of the board.