SLAS549D September   2008  – November 2014 TLV320AIC3254

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Block Diagram
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  Handling Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics, ADC
    6. 8.6  Electrical Characteristics, Bypass Outputs
    7. 8.7  Electrical Characteristics, Microphone Interface
    8. 8.8  Electrical Characteristics, Audio DAC Outputs
    9. 8.9  Electrical Characteristics, LDO
    10. 8.10 Electrical Characteristics, Misc.
    11. 8.11 Electrical Characteristics, Logic Levels
    12. 8.12 I2S LJF and RJF Timing in Master Mode (see )
    13. 8.13 I2S LJF and RJF Timing in Slave Mode (see )
    14. 8.14 DSP Timing in Master Mode (see )
    15. 8.15 DSP Timing in Slave Mode (see )
    16. 8.16 Digital Microphone PDM Timing (see )
    17. 8.17 I2C Interface Timing
    18. 8.18 SPI Interface Timing (See )
    19. 8.19 Typical Characteristics
    20. 8.20 Typical Characteristics, FFT
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Device Connections
        1. 10.3.1.1 Digital Pins
          1. 10.3.1.1.1 Multifunction Pins
        2. 10.3.1.2 Analog Pins
      2. 10.3.2 Analog Audio IO
        1. 10.3.2.1 Analog Low Power Bypass
        2. 10.3.2.2 ADC Bypass Using Mixer Amplifiers
        3. 10.3.2.3 Headphone Outputs
        4. 10.3.2.4 Line Outputs
      3. 10.3.3 ADC
        1. 10.3.3.1 ADC Processing
          1. 10.3.3.1.1 ADC Processing Blocks
      4. 10.3.4 DAC
        1. 10.3.4.1 DAC Processing Blocks
      5. 10.3.5 PowerTune
      6. 10.3.6 Digital Audio IO Interface
      7. 10.3.7 Clock Generation and PLL
      8. 10.3.8 Control Interfaces
        1. 10.3.8.1 I2C Control
        2. 10.3.8.2 SPI Control
    4. 10.4 Device Functional Modes
    5. 10.5 Software
    6. 10.6 Register Map
  11. 11Applications and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 Reference Filtering Capacitor
        2. 11.2.1.2 MICBIAS
      2. 11.2.2 Detailed Design Procedures
        1. 11.2.2.1 Analog Input Connection
        2. 11.2.2.2 Analog Output Connection
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Trademarks
    3. 14.3 Electrostatic Discharge Caution
    4. 14.4 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

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订购信息

1 Features

  • Stereo Audio DAC with 100dB SNR
  • 4.1mW Stereo 48ksps DAC Playback
  • Stereo Audio ADC with 93dB SNR
  • 6.1-mW Stereo 48-ksps ADC Record
  • PowerTune™
  • Extensive Signal Processing Options
  • Embedded miniDSP
  • Six Single-Ended or Three Fully-Differential Analog Inputs
  • Stereo Analog and Digital Microphone Inputs
  • Stereo Headphone Outputs
  • Stereo Line Outputs
  • Very Low-Noise PGA
  • Low Power Analog Bypass Mode
  • Programmable Microphone Bias
  • Programmable PLL
  • Integrated LDO
  • 5 mm x 5 mm 32-pin QFN Package

2 Applications

  • Portable Navigation Devices (PND)
  • Portable Media Player (PMP)
  • Mobile Handsets
  • Communication
  • Portable Computing
  • Advanced DSP algorithms

3 Description

The TLV320AIC3254 (sometimes referred to as the AIC3254) is a flexible, low-power, low-voltage stereo audio codec with programmable inputs and outputs, PowerTune capabilities, fully-programmable miniDSP, fixed predefined and parameterizable signal processing blocks, integrated PLL, integrated LDOs and flexible digital interfaces.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TLV320AIC3254 VQFN (32) 5.00 mm x 5.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

4 Simplified Block Diagram

sim_bd_las549.gif