ZHCS183G May   2011  – June 2015 OPA2314 , OPA314 , OPA4314

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA314
    5. 6.5 Thermal Information: OPA2314
    6. 6.6 Thermal Information: OPA4314
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Rail-to-Rail Input
      3. 7.3.3 Input and ESD Protection
      4. 7.3.4 Common-Mode Rejection Ratio (CMRR)
      5. 7.3.5 EMI Susceptibility and Input Filtering
      6. 7.3.6 Rail-to-Rail Output
      7. 7.3.7 Capacitive Load and Stability
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 General Configurations
      2. 8.1.2 Capacitive Load and Stability
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Amplifier Selection
        2. 8.2.2.2 Passive Component Selection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 器件命名规则
        1. 11.1.1.1 双边扁平无引线 (DFN) 封装
    2. 11.2 相关链接
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

11 器件和文档支持

11.1 器件支持

11.1.1 器件命名规则

11.1.1.1 双边扁平无引线 (DFN) 封装

OPA2314(双通道版本)使用 DFN 类型封装(也称为小外形尺寸无引线 (SON) 封装);这个封装是只在封装底部两侧有接触点的四方扁平无引线 (QFN) 封装。这个无引线封装大大增加了印刷电路板 (PCB) 尺寸并且通过一个外露散热垫来提高散热和电气特性。DFN 封装的一个主要优势是其 0.9mm 的低高度。DFN 封装物理尺寸小,具有更小的走线面积、改进的散热性能、减少的电气寄生,并且使用一个与其它诸如小外形尺寸 (SO) 和微型小外形尺寸 (MSOP) 等常见封装一致的引脚分配机制。此外,无外部引线也消除了引线弯曲问题的出现。

DFN 封装可使用标准 PCB 组装技巧轻松安装。请参见应用手册《QFN/SON PCB 附件》(文献编号:SLUA271)和应用报告《四方扁平无引线逻辑封装》(文献编号:SCBA017)。以上文献均可从 www.ti.com 下载。

NOTE

DFN 封装底部的外露引线框下垫板应该被连接至最低负电压 (V-)。

11.2 相关链接

以下表格列出了快速访问链接。范围包括技术文档、支持与社区资源、工具和软件,并且可以快速访问样片或购买链接。

11.3 社区资源

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 商标

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.5 静电放电警告

esds-image

这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损伤。

11.6 Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.