SBOS516G
September 2010 – May 2020
OPA171
,
OPA2171
,
OPA4171
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Offset Voltage vs Common-Mode Voltage
Offset Voltage vs Power Supply
4
Revision History
5
Pin Configuration and Functions
Pin Functions: OPA171
Pin Functions: OPA2171
Pin Functions: OPA4171
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information: OPA171
6.5
Thermal Information: OPA2171
6.6
Thermal Information: OPA4171
6.7
Electrical Characteristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Operating Characteristics
7.3.2
Common-Mode Voltage Range
7.3.3
Phase-Reversal Protection
7.3.4
Capacitive Load and Stability
7.4
Device Functional Modes
7.4.1
Common-Mode Voltage Range
8
Application and Implementation
8.1
Application Information
8.1.1
Electrical Overstress
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Capacitive Load and Stability
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Related Links
11.2
Support Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
D|8
MSOI002K
DRL|5
MPDS158D
DBV|5
MPDS018S
散热焊盘机械数据 (封装 | 引脚)
D|8
QFND304D
订购信息
zhcsac6d_oa
zhcsac6d_pm
6.8
Typical Characteristics
V
S
= ±18 V, V
CM
= V
S
/ 2, R
LOAD
= 10 kΩ connected to V
S
/ 2, and C
L
= 100 pF (unless otherwise noted)
Figure 1.
Offset Voltage Production Distribution
Figure 3.
Offset Voltage vs Temperature
Figure 5.
Offset Voltage vs Common-Mode Voltage (Upper Stage)
Figure 7.
I
B
and I
OS
vs Common-Mode Voltage
Figure 9.
Output Voltage Swing vs Output Current (Maximum Supply)
Figure 11.
CMRR vs Temperature
Figure 13.
0.1-Hz to 10-Hz Noise
Figure 15.
THD+N Ratio vs Frequency
Figure 17.
Quiescent Current vs Temperature
Figure 19.
Open-Loop Gain and Phase vs Frequency
Figure 21.
Open-Loop Gain vs Temperature
Figure 23.
Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
Figure 25.
No Phase Reversal
Figure 27.
Negative Overload Recovery
Figure 29.
Small-Signal Step Response (100 mV)
Figure 31.
Large-Signal Step Response
Figure 33.
Large-Signal Settling Time (10-V Negative Step)
Figure 35.
Maximum Output Voltage vs Frequency
Figure 2.
Offset Voltage Drift Distribution
Figure 4.
Offset Voltage vs Common-Mode Voltage
Figure 6.
Offset Voltage vs Power Supply
Figure 8.
Input Bias Current vs Temperature
Figure 10.
CMRR and PSRR vs Frequency (Referred-to Input)
Figure 12.
PSRR vs Temperature
Figure 14.
Input Voltage Noise Spectral Density vs Frequency
Figure 16.
THD+N vs Output Amplitude
Figure 18.
Quiescent Current vs Supply Voltage
Figure 20.
Closed-Loop Gain vs Frequency
Figure 22.
Open-Loop Output Impedance vs Frequency
Figure 24.
Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
Figure 26.
Positive Overload Recovery
Figure 28.
Small-Signal Step Response (100 mV)
Figure 30.
Large-Signal Step Response
Figure 32.
Large-Signal Settling Time (10-V Positive Step)
Figure 34.
Short-Circuit Current vs Temperature
Figure 36.
Channel Separation vs Frequency