The application can optimize the leakage power consumption of the SRAM in LPM3 and LPM4 modes of operation. To enable this, each SRAM bank is further divided into 8-KB blocks that can be individually configured for retention. Blocks that are enabled for retention retain their data through the LPM3 and LPM4 modes. The application can also retain a subset of the blocks in the enabled banks.
For example, the application may need 128KB of SRAM for its processing needs (two banks are kept enabled). However, of these two banks, only one 8-KB block may contain critical data that must be retained in LPM3 or LPM4, while the rest are powered off completely to minimize power consumption.
Block 0 of SRAM Bank 0 is always retained and cannot be powered down. Therefore, it also operates as a possible backup memory in the LPM3, LPM4, and LPM3.5 modes of operation.