ZHCSAJ5H November   2012  – September 2018 MSP430F5212 , MSP430F5214 , MSP430F5217 , MSP430F5219 , MSP430F5222 , MSP430F5224 , MSP430F5229

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用范围
    3. 1.3 说明
    4. 1.4 功能方框图
  2. 2修订历史记录
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagrams
    2. 4.2 Signal Descriptions
      1. Table 4-1 Terminal Functions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 5.5  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    6. 5.6  Thermal Resistance Characteristics
    7. 5.7  Schmitt-Trigger Inputs – General-Purpose I/O DVCC Domain (P1.0 to P1.3, P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3, RSTDVCC)
    8. 5.8  Schmitt-Trigger Inputs – General-Purpose I/O DVIO Domain (P1.4 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7, P7.0 to P7.5, RST/NMI, BSLEN)
    9. 5.9  Inputs – Interrupts DVCC Domain Port P1 (P1.0 to P1.3)
    10. 5.10 Inputs – Interrupts DVIO Domain Ports P1 and P2 (P1.4 to P1.7, P2.0 to P2.7)
    11. 5.11 Leakage Current – General-Purpose I/O DVCC Domain (P1.0 to P1.3, P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3)
    12. 5.12 Leakage Current – General-Purpose I/O DVIO Domain (P1.4 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7, P7.0 to P7.5)
    13. 5.13 Outputs – General-Purpose I/O DVCC Domain (Full Drive Strength) (P1.0 to P1.3, P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3)
    14. 5.14 Outputs – General-Purpose I/O DVCC Domain (Reduced Drive Strength) (P1.0 to P1.3, P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3)
    15. 5.15 Outputs – General-Purpose I/O DVIO Domain (Full Drive Strength) (P1.4 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7, P7.0 to P7.5)
    16. 5.16 Outputs – General-Purpose I/O DVIO Domain (Reduced Drive Strength) (P1.4 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7, P7.0 to P7.5)
    17. 5.17 Output Frequency – General-Purpose I/O DVCC Domain (P1.0 to P1.3, P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3)
    18. 5.18 Output Frequency – General-Purpose I/O DVIO Domain (P1.4 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7, P7.0 to P7.5)
    19. 5.19 Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
    20. 5.20 Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
    21. 5.21 Crystal Oscillator, XT1, Low-Frequency Mode
    22. 5.22 Crystal Oscillator, XT2
    23. 5.23 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
    24. 5.24 Internal Reference, Low-Frequency Oscillator (REFO)
    25. 5.25 DCO Frequency
    26. 5.26 PMM, Brownout Reset (BOR)
    27. 5.27 PMM, Core Voltage
    28. 5.28 PMM, SVS High Side
    29. 5.29 PMM, SVM High Side
    30. 5.30 PMM, SVS Low Side
    31. 5.31 PMM, SVM Low Side
    32. 5.32 Wake-up Times From Low-Power Modes and Reset
    33. 5.33 Timer_A
    34. 5.34 Timer_B
    35. 5.35 USCI (UART Mode), Recommended Operating Conditions
    36. 5.36 USCI (UART Mode)
    37. 5.37 USCI (SPI Master Mode), Recommended Operating Conditions
    38. 5.38 USCI (SPI Master Mode)
    39. 5.39 USCI (SPI Slave Mode)
    40. 5.40 USCI (I2C Mode)
    41. 5.41 10-Bit ADC, Power Supply and Input Range Conditions
    42. 5.42 10-Bit ADC, Timing Parameters
    43. 5.43 10-Bit ADC, Linearity Parameters
    44. 5.44 REF, External Reference
    45. 5.45 REF, Built-In Reference
    46. 5.46 Comparator_B
    47. 5.47 Flash Memory
    48. 5.48 JTAG and Spy-Bi-Wire Interface
    49. 5.49 DVIO BSL Entry
  6. 6Detailed Description
    1. 6.1  CPU (Link to user's guide)
    2. 6.2  Operating Modes
    3. 6.3  Interrupt Vector Addresses
    4. 6.4  Memory Organization
    5. 6.5  Bootloader (BSL)
    6. 6.6  JTAG Operation
      1. 6.6.1 JTAG Standard Interface
      2. 6.6.2 Spy-Bi-Wire Interface
    7. 6.7  Flash Memory (Link to user's guide)
    8. 6.8  RAM (Link to user's guide)
    9. 6.9  Peripherals
      1. 6.9.1  Digital I/O (Link to user's guide)
      2. 6.9.2  Port Mapping Controller (Link to user's guide)
      3. 6.9.3  Oscillator and System Clock (Link to user's guide)
      4. 6.9.4  Power-Management Module (PMM) (Link to user's guide)
      5. 6.9.5  Hardware Multiplier (Link to user's guide)
      6. 6.9.6  Real-Time Clock (RTC_A) (Link to user's guide)
      7. 6.9.7  Watchdog Timer (WDT_A) (Link to user's guide)
      8. 6.9.8  System Module (SYS) (Link to user's guide)
      9. 6.9.9  DMA Controller (Link to user's guide)
      10. 6.9.10 Universal Serial Communication Interface (USCI) (Links to user's guide: UART Mode, SPI Mode, I2C Mode)
      11. 6.9.11 TA0 (Link to user's guide)
      12. 6.9.12 TA1 (Link to user's guide)
      13. 6.9.13 TA2 (Link to user's guide)
      14. 6.9.14 TB0 (Link to user's guide)
      15. 6.9.15 Comparator_B (Link to user's guide)
      16. 6.9.16 ADC10_A (Link to user's guide)
      17. 6.9.17 CRC16 (Link to user's guide)
      18. 6.9.18 REF Voltage Reference (Link to user's guide)
      19. 6.9.19 Embedded Emulation Module (EEM) (S Version) (Link to user's guide)
      20. 6.9.20 Peripheral File Map
    10. 6.10 Input/Output Diagrams
      1. 6.10.1  Port P1 (P1.0 to P1.7) Input/Output With Schmitt Trigger
      2. 6.10.2  Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger
      3. 6.10.3  Port P3 (P3.0 to P3.4) Input/Output With Schmitt Trigger
      4. 6.10.4  Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger
      5. 6.10.5  Port P5 (P5.0 and P5.1) Input/Output With Schmitt Trigger
      6. 6.10.6  Port P5 (P5.2) Input/Output With Schmitt Trigger
      7. 6.10.7  Port P5 (P5.3) Input/Output With Schmitt Trigger
      8. 6.10.8  Port P5 (P5.4 and P5.5) Input/Output With Schmitt Trigger
      9. 6.10.9  Port P6 (P6.0 to P6.7) Input/Output With Schmitt Trigger
      10. 6.10.10 Port P7 (P7.0 to P7.5) Input/Output With Schmitt Trigger
      11. 6.10.11 Port PJ (PJ.0) JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      12. 6.10.12 Port PJ (PJ.1 to PJ.3) JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    11. 6.11 Device Descriptors
  7. 7器件和文档支持
    1. 7.1 开始使用
    2. 7.2 Device Nomenclature
    3. 7.3 工具与软件
    4. 7.4 文档支持
    5. 7.5 相关链接
    6. 7.6 社区资源
    7. 7.7 商标
    8. 7.8 静电放电警告
    9. 7.9 Glossary
  8. 8机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Device Descriptors

Table 6-54 and Table 6-55 list the contents of the device descriptor tag-length-value (TLV) structure for each device type.

Table 6-54 MSP430F522x Device Descriptor Table(1)

DESCRIPTION ADDRESS SIZE (BYTES) VALUE
F5229 F5227 F5224 F5222
Info Block Info length 01A00h 1 06h 06h 06h 06h
CRC length 01A01h 1 06h 06h 06h 06h
CRC value 01A02h 2 Per unit Per unit Per unit Per unit
Device ID 01A04h 1 51h 4Fh 4Ch 4Ah
Device ID 01A05h 1 81h 81h 81h 81h
Hardware revision 01A06h 1 Per unit Per unit Per unit Per unit
Firmware revision 01A07h 1 Per unit Per unit Per unit Per unit
Die Record Die record tag 01A08h 1 08h 08h 08h 08h
Die record length 01A09h 1 0Ah 0Ah 0Ah 0Ah
Lot/wafer ID 01A0Ah 4 Per unit Per unit Per unit Per unit
Die X position 01A0Eh 2 Per unit Per unit Per unit Per unit
Die Y position 01A10h 2 Per unit Per unit Per unit Per unit
Test results 01A12h 2 Per unit Per unit Per unit Per unit
ADC10 Calibration ADC10 calibration tag 01A14h 1 13h 13h 13h 13h
ADC10 calibration length 01A15h 1 10h 10h 10h 10h
ADC gain factor 01A16h 2 Per unit Per unit Per unit Per unit
ADC offset 01A18h 2 Per unit Per unit Per unit Per unit
ADC 1.5-V reference
Temperature sensor 30°C
01A1Ah 2 Per unit Per unit Per unit Per unit
ADC 1.5-V reference
Temperature sensor 85°C
01A1Ch 2 Per unit Per unit Per unit Per unit
ADC 2.0-V reference
Temperature sensor 30°C
01A1Eh 2 Per unit Per unit Per unit Per unit
ADC 2.0-V reference
Temperature sensor 85°C
01A20h 2 Per unit Per unit Per unit Per unit
ADC 2.5-V reference
Temperature sensor 30°C
01A22h 2 Per unit Per unit Per unit Per unit
ADC 2.5-V reference
Temperature sensor 85°C
01A24h 2 Per unit Per unit Per unit Per unit
REF Calibration REF calibration tag 01A26h 1 12h 12h 12h 12h
REF calibration length 01A27h 1 06h 06h 06h 06h
REF 1.5-V reference factor 01A28h 2 Per unit Per unit Per unit Per unit
REF 2.0-V reference factor 01A2Ah 2 Per unit Per unit Per unit Per unit
REF 2.5-V reference factor 01A2Ch 2 Per unit Per unit Per unit Per unit
Peripheral Descriptor Peripheral descriptor tag 01A2Eh 1 02h 02h 02h 02h
Peripheral descriptor length 01A2Fh 1 5Fh 5Fh 5Dh 5Dh
Memory 1 2 08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
Memory 2 2 0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
Memory 3 2 12h
2Eh
12h
2Eh
12h
2Eh
12h
2Eh
Memory 4 2 22h
96h
22h
94h
22h
96h
22h
94h
Memory 5 2 N/A N/A N/A N/A
Memory 6 1/2 N/A N/A N/A N/A
Delimiter 1 00h 00h 00h 00h
Peripheral count 1 20h 20h 1Fh 1Fh
MSP430CPUXV2 2 00h
23h
00h
23h
00h
23h
00h
23h
JTAG 2 00h
09h
00h
09h
00h
09h
00h
09h
SBW 2 00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
EEM-S 2 00h
03h
00h
03h
00h
03h
00h
05h
TI BSL 2 00h
FCh
00h
FCh
00h
FCh
00h
FCh
SFR 2 10h
41h
10h
41h
10h
41h
10h
41h
PMM 2 02h
30h
02h
30h
02h
30h
02h
30h
FCTL 2 02h
38h
02h
38h
02h
38h
02h
38h
CRC16 2 01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
CRC16_RB 2 00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
RAMCTL 2 00h
44h
00h
44h
00h
44h
00h
44h
WDT_A 2 00h
40h
00h
40h
00h
40h
00h
40h
UCS 2 01h
48h
01h
48h
01h
48h
01h
48h
SYS 2 02h
42h
02h
42h
02h
42h
02h
42h
REF 2 03h
A0h
03h
A0h
03h
A0h
03h
A0h
Port mapping 2 01h
10h
01h
10h
01h
10h
01h
10h
Port 1/2 2 04h
51h
04h
51h
04h
51h
04h
51h
Port 3/4 2 02h
52h
02h
52h
02h
52h
02h
52h
Port 5/6 2 02h
53h
02h
53h
02h
53h
02h
53h
Peripheral Descriptor (continued) Port 7/8 2 02h
54h
02h
54h
N/A N/A
JTAG 2 0Ch
5Fh
0Ch
5Fh
0Eh
5Fh
0Eh
5Fh
TA0 2 02h
62h
02h
62h
02h
62h
02h
62h
TA1 2 04h
61h
04h
61h
04h
61h
04h
61h
TB0 2 04h
67h
04h
67h
04h
67h
04h
67h
TA2 2 04h
61h
04h
61h
04h
61h
04h
61h
RTC 2 0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
MPY32 2 02h
85h
02h
85h
02h
85h
02h
85h
DMA-3 2 04h
47h
04h
47h
04h
47h
04h
47h
USCI_A/B 2 0Ch
90h
0Ch
90h
0Ch
90h
0Ch
90h
USCI_A/B 2 04h
90h
04h
90h
04h
90h
04h
90h
ADC10_A 2 14h
D3h
14h
D3h
14h
D3h
14h
D3h
COMP_B 2 18h
A8h
18h
A8h
18h
A8h
18h
A8h
Interrupts COMP_B 1 A8h A8h A8h A8h
TB0.CCIFG0 1 64h 64h 64h 64h
TB0.CCIFG1..6 1 65h 65h 65h 65h
WDTIFG 1 40h 40h 40h 40h
USCI_A0 1 90h 90h 90h 90h
USCI_B0 1 91h 91h 91h 91h
ADC10_A 1 D0h D0h D0h D0h
TA0.CCIFG0 1 60h 60h 60h 60h
TA0.CCIFG1..4 1 61h 61h 61h 61h
Reserved 1 01h 01h 01h 01h
DMA 1 46h 46h 46h 46h
TA1.CCIFG0 1 62h 62h 62h 62h
TA1.CCIFG1..2 1 63h 63h 63h 63h
P1 1 50h 50h 50h 50h
USCI_A1 1 92h 92h 92h 92h
USCI_B1 1 93h 93h 93h 93h
TA1.CCIFG0 1 66h 66h 66h 66h
TA1.CCIFG1..2 1 67h 67h 67h 67h
P2 1 51h 51h 51h 51h
RTC_A 1 68h 68h 68h 68h
Delimiter 1 00h 00h 00h 00h
NA = Not applicable

Table 6-55 MSP430F521x Device Descriptor Table(1)

DESCRIPTION ADDRESS SIZE (BYTES) VALUE
F5219 F5217 F5214 F5212
Info Block Info length 01A00h 1 06h 06h 06h 06h
CRC length 01A01h 1 06h 06h 06h 06h
CRC value 01A02h 2 Per unit Per unit Per unit Per unit
Device ID 01A04h 1 47h 45h 42h 40h
Device ID 01A05h 1 81h 81h 81h 81h
Hardware revision 01A06h 1 Per unit Per unit Per unit Per unit
Firmware revision 01A07h 1 Per unit Per unit Per unit Per unit
Die Record Die record tag 01A08h 1 08h 08h 08h 08h
Die record length 01A09h 1 0Ah 0Ah 0Ah 0Ah
Lot/wafer ID 01A0Ah 4 Per unit Per unit Per unit Per unit
Die X position 01A0Eh 2 Per unit Per unit Per unit Per unit
Die Y position 01A10h 2 Per unit Per unit Per unit Per unit
Test results 01A12h 2 Per unit Per unit Per unit Per unit
ADC10 Calibration ADC10 calibration tag 01A14h 1 13h 13h 13h 13h
ADC10 calibration length 01A15h 1 10h 10h 10h 10h
ADC gain factor 01A16h 2 Blank Blank Blank Blank
ADC offset 01A18h 2 Blank Blank Blank Blank
ADC 1.5-V reference
Temperature sensor 30°C
01A1Ah 2 Blank Blank Blank Blank
ADC 1.5-V Reference
Temperature sensor 85°C
01A1Ch 2 Blank Blank Blank Blank
ADC 2.0-V reference
Temperature sensor 30°C
01A1Eh 2 Blank Blank Blank Blank
ADC 2.0-V reference
Temperature sensor 85°C
01A20h 2 Blank Blank Blank Blank
ADC 2.5-V reference
Temperature sensor 30°C
01A22h 2 Blank Blank Blank Blank
ADC 2.5-V reference
Temperature sensor 85°C
01A24h 2 Blank Blank Blank Blank
REF Calibration REF calibration tag 01A26h 1 12h 12h 12h 12h
REF calibration length 01A27h 1 06h 06h 06h 06h
REF 1.5-V reference factor 01A28h 2 Per unit Per unit Per unit Per unit
REF 2.0-V reference factor 01A2Ah 2 Per unit Per unit Per unit Per unit
REF 2.5-V reference factor 01A2Ch 2 Per unit Per unit Per unit Per unit
Peripheral Descriptor Peripheral descriptor tag 01A2Eh 1 02h 02h 02h 02h
Peripheral descriptor length 01A2Fh 1 5Dh 5Dh 5Bh 5Bh
Memory 1 2 08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
Memory 2 2 0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
Memory 3 2 12h
2Eh
12h
2Eh
12h
2Eh
12h
2Eh
Memory 4 2 22h
96h
22h
94h
22h
96h
22h
94h
Memory 5 2 N/A N/A N/A N/A
Memory 6 1/2 N/A N/A N/A N/A
Delimiter 1 00h 00h 00h 00h
Peripheral count 1 1Fh 1Fh 1Eh 1Eh
MSP430CPUXV2 2 00h
23h
00h
23h
00h
23h
00h
23h
JTAG 2 00h
09h
00h
09h
00h
09h
00h
09h
SBW 2 00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
EEM-S 2 00h
03h
00h
03h
00h
03h
00h
05h
TI BSL 2 00h
FCh
00h
FCh
00h
FCh
00h
FCh
SFR 2 10h
41h
10h
41h
10h
41h
10h
41h
PMM 2 02h
30h
02h
30h
02h
30h
02h
30h
FCTL 2 02h
38h
02h
38h
02h
38h
02h
38h
CRC16 2 01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
CRC16_RB 2 00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
RAMCTL 2 00h
44h
00h
44h
00h
44h
00h
44h
WDT_A 2 00h
40h
00h
40h
00h
40h
00h
40h
UCS 2 01h
48h
01h
48h
01h
48h
01h
48h
SYS 2 02h
42h
02h
42h
02h
42h
02h
42h
REF 2 03h
A0h
03h
A0h
03h
A0h
03h
A0h
Port mapping 2 01h
10h
01h
10h
01h
10h
01h
10h
Port 1/2 2 04h
51h
04h
51h
04h
51h
04h
51h
Port 3/4 2 02h
52h
02h
52h
02h
52h
02h
52h
Port 5/6 2 02h
53h
02h
53h
02h
53h
02h
53h
Peripheral Descriptor (continued) Port 7/8 2 02h
54h
02h
54h
N/A N/A
JTAG 2 0Ch
5Fh
0Ch
5Fh
0Eh
5Fh
0Eh
5Fh
TA0 2 02h
62h
02h
62h
02h
62h
02h
62h
TA1 2 04h
61h
04h
61h
04h
61h
04h
61h
TB0 2 04h
67h
04h
67h
04h
67h
04h
67h
TA2 2 04h
61h
04h
61h
04h
61h
04h
61h
RTC 2 0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
MPY32 2 02h
85h
02h
85h
02h
85h
02h
85h
DMA-3 2 04h
47h
04h
47h
04h
47h
04h
47h
USCI_A/B 2 0Ch
90h
0Ch
90h
0Ch
90h
0Ch
90h
USCI_A/B 2 04h
90h
04h
90h
04h
90h
04h
90h
ADC10_A 2 N/A N/A N/A N/A
COMP_B 2 2Ch
A8h
2Ch
A8h
2Ch
A8h
2Ch
A8h
Interrupts COMP_B 1 A8h A8h A8h A8h
TB0.CCIFG0 1 64h 64h 64h 64h
TB0.CCIFG1..6 1 65h 65h 65h 65h
WDTIFG 1 40h 40h 40h 40h
USCI_A0 1 90h 90h 90h 90h
USCI_B0 1 91h 91h 91h 91h
Reserved 1 01h 01h 01h 01h
TA0.CCIFG0 1 60h 60h 60h 60h
TA0.CCIFG1..4 1 61h 61h 61h 61h
Reserved 1 01h 01h 01h 01h
DMA 1 46h 46h 46h 46h
TA1.CCIFG0 1 62h 62h 62h 62h
TA1.CCIFG1..2 1 63h 63h 63h 63h
P1 1 50h 50h 50h 50h
USCI_A1 1 92h 92h 92h 92h
USCI_B1 1 93h 93h 93h 93h
TA2.CCIFG0 1 66h 66h 66h 66h
TA2.CCIFG1..2 1 67h 67h 67h 67h
P2 1 51h 51h 51h 51h
RTC_A 1 68h 68h 68h 68h
Delimiter 1 00h 00h 00h 00h
NA = Not applicable, Blank = unused and reads FFh