SNVS773D April   2000  – September 2015 LM117HV , LM317HV

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Load Regulation
      2. 8.3.2 Current Limit
    4. 8.4 Device Functional Modes
      1. 8.4.1 External Capacitors
      2. 8.4.2 Protection Diodes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1  1.25-V to 45-V High Voltage Adjustable Regulator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2  Digitally Selected Outputs
      3. 9.2.3  Logic Regulator (5-V) With Electronic Shutdown
      4. 9.2.4  Slow Turnon 15-V Regulator
      5. 9.2.5  Adjustable Regulator With Improved Ripple Rejection
      6. 9.2.6  High Stability 10-V Regulator
      7. 9.2.7  High Current Adjustable Regulator
      8. 9.2.8  Emitter Follower Current Amplifier
      9. 9.2.9  1-A Current Regulator
      10. 9.2.10 Common Emitter Amplifier
      11. 9.2.11 Low-Cost, 3-A Switching Regulator
      12. 9.2.12 Adjustable Multiple On-Card Regulators With Single Control
      13. 9.2.13 AC Voltage Regulator
      14. 9.2.14 12-V Battery Charger
      15. 9.2.15 Adjustable 4-A Regulator
      16. 9.2.16 Current Limited 6-V Charger
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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11 Layout

11.1 Layout Guidelines

Some layout guidelines should be followed to ensure proper regulation of the output voltage with minimum noise. Traces carrying the load current should be wide to reduce the amount of parasitic trace inductance and the feedback loop from V2 to ADJ should be kept as short as possible. To improve PSRR, a bypass capacitor can be placed at the ADJ pin and should be located as close as possible to the IC. In cases when VIN shorts to ground, an external diode should be placed from VOUT to VIN to divert the surge current from the output capacitor and protect the IC. Similarly, in cases when a large bypass capacitor is placed at the ADJ pin and VOUT shorts to ground, an external diode should be placed from ADJ to VOUT to provide a path for the bypass capacitor to discharge. These diodes should be placed close to the corresponding IC pins to increase their effectiveness.

11.2 Layout Example

LM117HV LM317HV LM317-TO220-layoutexample.png Figure 33. Layout Example (TO-220 Package)