ZHCS321I June 2009 – January 2015 ISO1050
The ISO1050 is a digitally isolated CAN transceiver with a typical transient immunity of 50 kV/µs. The device can operate from 3.3-V supply on side 1 and 5-V supply on side 2. This is of particular advantage for applications operating in harsh industrial environments because the 3.3 V on side 1 enables the connection to low-volt microcontrollers for power preservation, whereas the 5 V on side 2 maintains a high signal-to-noise ratio of the bus signals.
|L(I01)||Minimum air gap (Clearance)||Shortest pin-to-pin distance through air, per JEDEC package dimensions||DUB-8||6.1||mm|
|L(I02)||Minimum external tracking (Creepage)||Shortest pin-to-pin distance across the package surface, per JEDEC package dimensions||6.8||mm|
|L(I01)||Minimum air gap (Clearance)||Shortest pin-to-pin distance through air, per JEDEC package dimensions||DW-16||8.34||mm|
|L(I02)||Minimum external tracking (Creepage)||Shortest pin-to-pin distance across the package surface, per JEDEC package dimensions||8.10||mm|
|Minimum Internal Gap (Internal Clearance)||Distance through the insulation||0.014||mm|
|RIO||Isolation resistance||Input to output, VIO = 500 V, all pins on each side of the barrier tied together creating a two-pin device,
TA = 25°C
|Input to output, VIO = 500 V, 100°C ≤TA ≤TA max||>1011||Ω|
|CIO||Barrier capacitance||VI = 0.4 sin (4E6πt)||1.9||pF|
|CI||Input capacitance to ground||VI = 0.4 sin (4E6πt)||1.3||pF|
|VIORM||Maximum working insulation voltage per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12||ISO1050DUB||560||Vpeak|
|VPR||Input to output test voltage per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12||ISO1050DUB||VPR = 1.875 x VIORM, t = 1 sec (100% production)
Partial discharge < 5 pC
|VIOTM||Transient overvoltage per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12||t = 60 sec (qualification)||4000||Vpeak|
|t = 1 sec (100% production)|
|VISO||Isolation voltage per UL 1577||ISO1050DUB - Double Protection||t = 60 sec (qualification)
|t = 1 sec (100% production)||3000|
|ISO1050DW - Single Protection||t = 60 sec (qualification)||4243||Vrms|
|t = 1 sec (100% production)||5092|
|RS||Isolation resistance||VIO = 500 V at TS||> 109||Ω|
|Basic isolation group||Material group||II|
|Installation classification||Rated mains voltage ≤ 150 Vrms||I–IV|
|Rated mains voltage ≤ 300 Vrms||I–III|
|Rated mains voltage ≤ 400 Vrms||I–II|
|Rated mains voltage ≤ 600 Vrms (ISO1050DW only)||I-II|
|Rated mains voltage ≤ 848 Vrms (ISO1050DW only)||I|
|IS||Safety input, output, or supply current||DUB-8||θJA = 73.3 °C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C||310||mA|
|θJA = 73.3 °C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C||474|
|DW-16||θJA = 76 °C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C||299||mA|
|θJA = 76 °C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C||457|
|TS||Maximum case temperature||150||°C|
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assured junction-to-air thermal resistance in Thermal Information is that of a device installed on a High-K Test Board for Leaded Surface Mount Packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.
|Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 & DIN EN 61010-1||Certified according to EN/UL/CSA 60950-1||Approved under CSA Component Acceptance Notice 5A||Recognized under 1577 Component Recognition Program(1)||Certified according to GB4943.1-2011|
Transient Overvoltage, 4000 VPK
Surge Voltage, 4000 VPK
Maximum Working Voltage, 1200 VPK (ISO1050DW) and
560 VPK (ISO1050DUB)
5000 VRMS Reinforced Insulation,
400 VRMS maximum working voltage
5000 VRMS Basic Insulation,
600 VRMS maximum working voltage
2500 VRMS Reinforced Insulation,
400 VRMS maximum working voltage
2500 VRMS Basic Insulation,
600 VRMS maximum working voltage
|5000 VRMS Reinforced Insulation
2 Means of Patient Protection at 125 VRMS per IEC 60601-1 (3rd Ed.)
| ISO1050DUB: 2500 VRMS Double Protection
ISO1050DW: 3500 VRMS Double Protection,
4243 VRMS Single Protection
Reinforced Insulation, Altitude ≤ 5000 m, Tropical Climate, 250 VRMS maximum working voltage
|Certificate number: 40016131||Certificate number: U8V 11 09 77311 008||Master contract number: 220991||File number: E181974||Certificate number: CQC14001109541|
The CAN bus has two states during operation: dominant and recessive. A dominant bus state, equivalent to logic low, is when the bus is driven differentially by a driver. A recessive bus state is when the bus is biased to a common mode of VCC / 2 through the high-resistance internal input resistors of the receiver, equivalent to a logic high. The host microprocessor of the CAN node will use the TXD pin to drive the bus and will receive data from the bus on the RXD pin. See Figure 23 and Figure 24.
TXD (Input) and RXD (Output):
VCC1 for the isolated digital input and output side of the device maybe supplied by a 3.3-V or 5-V supply and thus the digital inputs and outputs are 3.3-V and 5-V compatible.
TXD is very weakly internally pulled up to VCC1. An external pullup resistor should be used to make sure that TXD is biased to recessive (high) level to avoid issues on the bus if the microprocessor doesn't control the pin and TXD floats. TXD pullup strength and CAN bit timing require special consideration when the device is used with an open-drain TXD output on the CAN controller of the microprocessor. An adequate external pullup resistor must be used to ensure that the TXD output of the microprocessor maintains adequate bit timing input to the input on the transceiver.
TXD DTO circuit prevents the local node from blocking network communication in the event of a hardware or software failure where TXD is held dominant longer than the time-out period tTXD_DTO. The TXD DTO circuit timer starts on a falling edge on TXD. The TXD DTO circuit disables the CAN bus driver if no rising edge is seen before the time-out period expires. This frees the bus for communication between other nodes on the network. The CAN driver is re-activated when a recessive signal is seen on the TXD pin, thus clearing the TXD DTO condition. The receiver and RXD pin still reflect the CAN bus, and the bus pins are biased to recessive level during a TXD dominant time-out.
The minimum dominant TXD time allowed by the TXD DTO circuit limits the minimum possible transmitted data rate of the device. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst case, where five successive dominant bits are followed immediately by an error frame. This, along with the tTXD_DTO minimum, limits the minimum data rate. Calculate the minimum transmitted data rate by: Minimum Data Rate = 11 / tTXD_DTO.
If the junction temperature of the device exceeds the thermal shut down threshold the device turns off the CAN driver circuits thus blocking the TXD to bus transmission path. The shutdown condition is cleared when the junction temperature drops below the thermal shutdown temperature of the device. If the fault condition is still present, the temperature may rise again and the device would enter thermal shut down again. Prolonged operation with thermal shutdown conditions may affect device reliability.
During thermal shutdown the CAN bus drivers turn off; thus no transmission is possible from TXD to the bus. The CAN bus pins are biased to recessive level during a thermal shutdown, and the receiver to RXD path remains operational.
The supply pins have undervoltage detection that places the device in protected or fail-safe mode. This protects the bus during an undervoltage event on VCC1 or VCC2 supply pins. If the bus-side power supply Vcc2 is lower than about 2.7V, the power shutdown circuits in the ISO1050 will disable the transceiver to prevent false transmissions due to an unstable supply. If Vcc1 is still active when this occurs, the receiver output (RXD) will go to a fail-safe HIGH (recessive) value in about 6 microseconds.
|VCC1||VCC2||DEVICE STATE||BUS OUTPUT||RXD|
|GOOD||GOOD||Functional||Per Device State and TXD||Mirrors Bus|
|BAD||GOOD||Protected||Recessive||High Impedance (3-state)|
|GOOD||BAD||Protected||High Impedance||Recessive (Fail-Safe High)|
After an undervoltage condition is cleared and the supplies have returned to valid levels, the device typically resumes normal operation in 300 µs
Pullups and pulldowns should be used on critical pins to place the device into known states if the pins float. The TXD pin should be pulled up through a resistor to VCC1 to force a recessive input level if the microprocessor output to the pin floats.
The device has several protection features that limit the short-circuit current when a CAN bus line is shorted. These include driver current limiting (dominant and recessive). The device has TXD dominant state time out to prevent permanent higher short-circuit current of the dominant state during a system fault. During CAN communication the bus switches between dominant and recessive states with the data and control fields bits, thus the short-circuit current may be viewed either as the instantaneous current during each bus state, or as a DC average current. For system current (power supply) and power considerations in the termination resistors and common-mode choke ratings, use the average short-circuit current. Determine the ratio of dominant and recessive bits by the data in the CAN frame plus the following factors of the protocol and PHY that force either recessive or dominant at certain times:
The short-circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short-circuit currents. The average short-circuit current may be calculated with the following formula:
IOS(AVG) = %Transmit × [(%REC_Bits × IOS(SS)_REC) + (%DOM_Bits × IOS(SS)_DOM)] + [%Receive × IOS(SS)_REC]
Consider the short.circuit current and possible fault cases of the network when sizing the power ratings of the termination resistance and other network components.
|INPUT||OUTPUTS||DRIVEN BUS STATE|
|DEVICE MODE||CAN DIFFERENTIAL INPUTS
VID = VCANH – VCANL
|BUS STATE||RXD PIN(1)|
|Normal or Silent||VID ≥ 0.9 V||Dominant||L|
|0.5 V < VID < 0.9 V||?||?|
|VID ≤ 0.5 V||Recessive||H|
|Open (VID ≈ 0 V)||Open||H|
|INPUTS||OUTPUTS||BUS STATE||DIFFERENTIAL INPUTS VID = CANH–CANL||OUTPUT
|L(2)||H||L||DOMINANT||VID ≥ 0.9 V||L||DOMINANT|
|H||Z||Z||RECESSIVE||0.5 V < VID < 0.9 V||?||?|
|Open||Z||Z||RECESSIVE||VID ≤ 0.5 V||H||RECESSIVE|