ZHCS321I June   2009  – January 2015 ISO1050

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Supply Current
    6. 6.6  Electrical Characteristics: Driver
    7. 6.7  Electrical Characteristics: Receiver
    8. 6.8  Switching Characteristics: Device
    9. 6.9  Switching Characteristics: Driver
    10. 6.10 Switching Characteristics: Receiver
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Time-Out (DTO)
        2. 8.3.3.2 Thermal Shutdown
        3. 8.3.3.3 Undervoltage Lockout and Fail-Safe
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 CAN Bus Short-Circuit Current Limiting
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 术语表
  13. 13机械封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DUB|8
  • DW|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings(1)(2)

MIN MAX UNIT
VCC1, VCC2 Supply voltage (3) –0.5 6 V
VI Voltage input (TXD) –0.5 VCC1+ 0.5(4) V
VCANH or VCANL Voltage at any bus terminal (CANH, CANL) –27 40 V
IO Receiver output current –15 15 mA
TJ Junction temperature –55 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) This isolator is suitable for isolation within the safety limiting data. Maintenance of the safety data must be ensured by means of protective circuitry.
(3) All input and output logic voltage values are measured with respect to the GND1 logic side ground. Differential bus-side voltages are measured to the respective bus-side GND2 ground terminal.
(4) Maximum voltage must not exceed 6 V.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±4000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1500
Machine model, ANSI/ESDS5.2-1996, all pins ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VCC1 Supply voltage, controller side 3 5.5 V
VCC2 Supply voltage, bus side 4.75 5 5.25 V
VI or VIC Voltage at bus pins (separately or common mode) –12(1) 12 V
VIH High-level input voltage TXD 2 5.25 V
VIL Low-level input voltage TXD 0 0.8 V
VID Differential input voltage –7 7 V
IOH High-level output current Driver –70 mA
Receiver –4
IOL Low-level output current Driver 70 mA
Receiver 4
TA Ambient Temperature –55 105 °C
TJ Junction temperature (see Thermal Information) –55 125 °C
PD Total power dissipation VCC1= 5.5V, VCC2= 5.25V, TA=105°C, RL= 60Ω,
TXD input is a 500kHz 50% duty-cycle square wave
200 mW
PD1 Power dissipation by Side-1 25
PD2 Power dissipation by Side-2 175
Tj shutdown Thermal shutdown temperature(2) 190 °C
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
(2) Extended operation in thermal shutdown may affect device reliability.

6.4 Thermal Information

THERMAL METRIC(1) ISO1050 UNIT
DW DUB
16 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 76.0 73.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 41 63.2
RθJB Junction-to-board thermal resistance 47.7 43.0
ψJT Junction-to-top characterization parameter 14.4 27.4
ψJB Junction-to-board characterization parameter 38.2 42.7
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: Supply Current

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
ICC1 VCC1 Supply current VI = 0 V or VCC1 , VCC1 = 3.3V 1.8 2.8 mA
VI = 0 V or VCC1 , VCC1 = 5V 2.3 3.6
ICC2 VCC2 Supply current Dominant VI = 0 V, 60-Ω Load 52 73 mA
Recessive VI = VCC1 8 12
(1) All typical values are at 25°C with VCC1 = VCC2 = 5 V.

6.6 Electrical Characteristics: Driver

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VO(D) Bus output voltage (Dominant) CANH See Figure 7 and Figure 8, VI = 0 V, RL = 60 Ω 2.9 3.5 4.5 V
CANL 0.8 1.2 1.5
VO(R) Bus output voltage (Recessive) See Figure 7 and Figure 8, VI = 2 V, RL= 60 Ω 2 2.3 3 V
VOD(D) Differential output voltage (Dominant) See Figure 7, Figure 8 and Figure 9, VI = 0 V, RL = 60 Ω 1.5 3 V
See Figure 7, Figure 8, and Figure 9 VI = 0 V, RL = 45Ω, Vcc > 4.8 V 1.4 3
VOD(R) Differential output voltage (Recessive) See Figure 7 and Figure 8, VI = 3 V, RL = 60 Ω –0.12 0.012 V
VI = 3 V, No Load –0.5 0.05
VOC(D) Common-mode output voltage (Dominant) See Figure 14 2 2.3 3 V
VOC(pp) Peak-to-peak common-mode output voltage 0.3
IIH High-level input current, TXD input VI at 2 V 5 μA
IIL Low-level input current, TXD input VI at 0.8 V –5 μA
IO(off) Power-off TXD leakage current VCC1, VCC2 at 0 V, TXD at 5 V 10 μA
IOS(ss) Short-circuit steady-state output current See Figure 17, VCANH = –12 V, CANL Open –105 –72 mA
See Figure 17, VCANH = 12 V, CANL Open 0.36 1
See Figure 17, VCANL =–12 V, CANH Open –1 –0.5
See Figure 17, VCANL = 12 V, CANH Open 71 105
CO Output capacitance See receiver input capacitance
CMTI Common-mode transient immunity See Figure 19, VI = VCC or 0 V 25 50 kV/μs

6.7 Electrical Characteristics: Receiver

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIT+ Positive-going bus input threshold voltage See Table 1 750 900 mV
VIT– Negative-going bus input threshold voltage 500 650 mV
Vhys Hysteresis voltage (VIT+ – VIT–) 150 mV
VOH High-level output voltage with Vcc = 5 V IOH = –4 mA, See Figure 12 VCC – 0.8 4.6 V
IOH = –20 μA, See Figure 12 VCC – 0.1 5
VOH High-level output voltage with Vcc1 = 3.3 V IOL = 4 mA, See Figure 12 VCC – 0.8 3.1 V
IOL = 20 μA, See Figure 12 VCC – 0.1 3.3
VOL Low-level output voltage IOL = 4 mA, See Figure 12 0.2 0.4 V
IOL = 20 μA, See Figure 12 0 0.1
CI Input capacitance to ground, (CANH or CANL) TXD at 3 V, VI = 0.4 sin (4E6πt) + 2.5 V 6 pF
CID Differential input capacitance TXD at 3 V, VI = 0.4 sin (4E6πt) 3 pF
RID Differential input resistance TXD at 3 V 30 80
RIN Input resistance (CANH or CANL) TXD at 3 V 15 30 40
RI(m) Input resistance matching
(1 – [RIN(CANH) / RIN (CANL)]) × 100%
VCANH = VCANL –3% 0% 3%
CMTI Common-mode transient immunity VI = VCC or 0 V, See Figure 19 25 50 kV/μs
(1) All typical values are at 25°C with VCC1 = VCC2 = 5 V.

6.8 Switching Characteristics: Device

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tloop1 Total loop delay, driver input to receiver output, Recessive to Dominant See Figure 15 112 150 210 ns
tloop2 Total loop delay, driver input to receiver output, Dominant to Recessive See Figure 15 112 150 210 ns

6.9 Switching Characteristics: Driver

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, recessive-to-dominant output See Figure 10 31 74 110 ns
tPHL Propagation delay time, dominant-to-recessive output 25 44 75
tr Differential output signal rise time 20 50
tf Differential output signal fall time 20 50
tTXD_DTO(1) Dominant time-out ↓ CL=100 pF, See Figure 16 300 450 700 μs
(1) The TXD dominant time out (tTXD_DTO) disables the driver of the transceiver once the TXD has been dominant longer than (tTXD_DTO) which releases the bus lines to recessive preventing a local failure from locking the bus dominant. The driver may only transmit dominant again after TXD has been returned HIGH (recessive). While this protects the bus from local faults locking the bus dominant it limits the minimum data rate possible. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst case where five successive dominant bits are followed immediately by an error frame. This along with the (tTXD_DTO) minimum limits the minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11/ (tTXD_DTO) = 11 bits / 300 µs = 37 kbps.

6.10 Switching Characteristics: Receiver

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output TXD at 3 V, See Figure 12 66 90 130 ns
tPHL Propagation delay time, high-to-low-level output 51 80 105
tr Output signal rise time 3 6
tf Output signal fall time 3 6
tfs Fail-Safe output delay time from bus-side power loss VCC1 at 5 V, See Figure 18 6 μs

6.11 Typical Characteristics

ISO1050 loop_ta_lls983.gifFigure 1. Recessive-to-Dominant Loop Time vs Free-Air Temperature (Across Vcc)
ISO1050 icc_sr_lls983.gifFigure 3. Supply Current (RMS) vs Signaling Rate (kbps)
ISO1050 emiss_10mhz_lls983.gifFigure 5. Emissions Spectrum to 10 MHz
ISO1050 loop2_ta_lls983.gifFigure 2. Dominant-to-Recessive Loop Time vs Free-Air Temperature (Across Vcc)
ISO1050 vo_ta_lls983.gifFigure 4. Driver Output Voltage vs Free-Air Temperature
ISO1050 emiss_50mhz_lls983.gifFigure 6. Emissions Spectrum to 50 MHz