ZHCSGB2 June   2017

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Supply Current
    6. 6.6  Power Supply Control
    7. 6.7  Low-Voltage General Purpose I/O, TS1
    8. 6.8  Power-On Reset (POR)
    9. 6.9  Internal 1.8-V LDO
    10. 6.10 Current Wake Comparator
    11. 6.11 Coulomb Counter
    12. 6.12 ADC Digital Filter
    13. 6.13 ADC Multiplexer
    14. 6.14 Internal Temperature Sensor
    15. 6.15 NTC Thermistor Measurement Support
    16. 6.16 High-Frequency Oscillator
    17. 6.17 Low-Frequency Oscillator
    18. 6.18 Voltage Reference 1
    19. 6.19 Voltage Reference 2
    20. 6.20 Instruction Flash
    21. 6.21 Data Flash
    22. 6.22 Current Protection Thresholds
    23. 6.23 Current Protection Timing
    24. 6.24 N-CH FET Drive (CHG, DSG)
    25. 6.25 I2C Interface I/O
    26. 6.26 I2C Interface Timing
    27. 6.27 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Battery Parameter Measurements
        1. 7.3.1.1 bq27750 Processor
      2. 7.3.2  Coulomb Counter (CC)
      3. 7.3.3  CC Digital Filter
      4. 7.3.4  ADC Multiplexer
      5. 7.3.5  Analog-to-Digital Converter (ADC)
      6. 7.3.6  ADC Digital Filter
      7. 7.3.7  Internal Temperature Sensor
      8. 7.3.8  External Temperature Sensor Support
      9. 7.3.9  Power Supply Control
      10. 7.3.10 Power-On Reset
      11. 7.3.11 Bus Communication Interface
      12. 7.3.12 N-Channel Protection FET Drive
      13. 7.3.13 Low Frequency Oscillator
      14. 7.3.14 High Frequency Oscillator
      15. 7.3.15 1.8-V Low Dropout Regulator
      16. 7.3.16 Internal Voltage References
      17. 7.3.17 Overcurrent in Discharge Protection
      18. 7.3.18 Short-Circuit Current in Charge Protection
      19. 7.3.19 Short-Circuit Current in Discharge 1 and 2 Protection
      20. 7.3.20 Primary Protection Features
      21. 7.3.21 Gas Gauging
      22. 7.3.22 Charge Control Features
      23. 7.3.23 Authentication
    4. 7.4 Device Functional Modes
      1. 7.4.1 Lifetime Logging Features
      2. 7.4.2 Configuration
        1. 7.4.2.1 Coulomb Counting
        2. 7.4.2.2 Cell Voltage Measurements
        3. 7.4.2.3 Current Measurements
        4. 7.4.2.4 Auto Calibration
        5. 7.4.2.5 Temperature Measurements
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements (Default)
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting Design Parameters
      3. 8.2.3 Calibration Process
      4. 8.2.4 Gauging Data Updates
        1. 8.2.4.1 Application Curve
  9. Power Supply Requirements
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
    2. 11.2 商标
    3. 11.3 静电放电警告
    4. 11.4 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
订购信息

Specifications

Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)(1)
MINMAXUNIT
Supply voltage range, VCCBAT, PBI–0.330V
Input voltage range, VINPACK–0.330V
TS –0.3VREG + 0.3V
SRP, SRN–0.30.3V
BATVCELL/INT – 0.3VCELL/INT + 8.5 or VSS + 30V
VCELL/INTVSS – 0.3VSS + 8.5V
Output voltage range, VOCHG, DSG–0.332V
Maximum VSS current, ISS±50mA
Functional Temperature, TFUNC–40110°C
Lead temperature (soldering, 10 s), TSOLDER±300°C
Storage temperature range, TSTG–65150°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

ESD Ratings

VALUEUNIT
V(ESD)Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Recommended Operating Conditions

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
MINNOMMAXUNIT
VCCSupply voltageBAT, PBI2.226V
VSHUTDOWN–Shutdown voltageVPACK < VSHUTDOWN1.82.02.2V
VSHUTDOWN+Start-up voltageVPACK > VSHUTDOWN– + VHYS2.052.252.45V
VHYSShutdown voltage hysteresisVSHUTDOWN+ – VSHUTDOWN–250mV
VINInput voltage range SDA, SCL 5.5V
TS1 VREG
SRP, SRN–0.20.2
BATVVCELL/INTVVCELL/INT + 5
VCELL/INTVVSSVVSS + 5
PACK26
VOOutput voltage rangeCHG, DSG26V
CPBIExternal PBI capacitor2.2µF
TOPROperating temperature–4085°C

Thermal Information

THERMAL METRIC(1)bq27750UNIT
VSON (DRZ)
12 PINS
RθJA, High KJunction-to-ambient thermal resistance186.4°C/W
RθJC(top)Junction-to-case(top) thermal resistance90.4
RθJBJunction-to-board thermal resistance110.7
ψJTJunction-to-top characterization parameter96.7
ψJBJunction-to-board characterization parameter90
RθJC(bottom)Junction-to-case(bottom) thermal resistancen/a
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

Supply Current

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
INORMAL(1)NORMAL modeCHG = ON, DSG = ON, No Flash Write250 µA
ISLEEP(1)SLEEP modeCHG = OFF, DSG = OFF, No Communication on Bus100
ISHUTDOWNSHUTDOWN mode0.52µA
Dependent on the use of the correct firmware (FW) configuration

Power Supply Control

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VSWITCHOVER–BAT to PACK switchover voltageVBAT < VSWITCHOVER–2.02.12.2V
VSWITCHOVER+PACK to BAT switchover voltageVBAT > VSWITCHOVER– + VHYS3.03.13.2V
VHYSSwitchover voltage hysteresisVSWITCHOVER+ – VSWITCHOVER–1000mV
ILKGInput Leakage currentBAT pin, BAT = 0 V, PACK = 25 V1µA
PACK pin, BAT = 25 V, PACK = 0 V1
BAT and PACK pins, BAT = 0 V, PACK = 0 V,
PBI = 25 V
1
RPACK(PD)Internal pulldown resistancePACK304050

Low-Voltage General Purpose I/O, TS1

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VIHHigh-level input0.65 x VREGV
VILLow-level input0.35 x VREGV
VOHOutput voltage high IOH = – 1.0 mA0.75 x VREGV
VOLOutput voltage low IOL = 1.0 mA0.2 x VREGV
CINInput capacitance5pF
ILKGInput leakage current1µA

Power-On Reset (POR)

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VREGIT–Negative-going voltage inputVREG1.511.551.59V
VHYSPower-on reset hysteresisVREGIT+ – VREGIT–70100130mV
tRSTPower-on reset time200300400µs

Internal 1.8-V LDO

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VREGRegulator voltage1.61.82.0V
ΔVO(TEMP)Regulator output over temperatureΔVREG/ΔTA, IREG = 10 mA±0.25%
ΔVO(LINE)Line regulationΔVREG/ΔVBAT, VBAT = 10 mA–0 .6%0.5%
ΔVO(LOAD)Load regulationΔVREG/ΔIREG, IREG = 0 mA to 10 mA–1.5%1.5%
IREGRegulator output current limitVREG = 0.9 x VREG(NOM), VIN > 2.2 V20mA
ISCRegulator short-circuit current limitVREG = 0 x VREG(NOM)254050mA
PSRRREGPower supply rejection ratioΔVBAT/ΔVREG, IREG = 10 mA, VIN > 2.5 V, f = 10 Hz40dB
VSLEWSlew rate enhancement voltage thresholdVREG1.581.65V

Current Wake Comparator

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VWAKEWake voltage thresholdVWAKE = VSRP – VSRN WAKE_CONTROL[WK1, WK0] = 0,0±0.3±0.625±0.9mV
VWAKE = VSRP – VSRN WAKE_CONTROL[WK1, WK0] = 0,1±0.6±1.25±1.8mV
VWAKE = VSRP – VSRN WAKE_CONTROL[WK1, WK0] = 1,0±1.2±2.5±3.6mV
VWAKE = VSRP – VSRN WAKE_CONTROL[WK1, WK0] = 1,1±2.4±5.0±7.2mV
VWAKE(DRIFT)Temperature drift of VWAKE accuracy0.5%°C
tWAKETime from application of current to wake0.250.5ms
tWAKE(SU)Wake up comparator startup time[WKCHGEN] = 0 and [WKDSGEN] = 0 to [WKCHGEN] = 1 and [WKDSGEN] = 1250640µs

Coulomb Counter

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
Input voltage range–100100mV
Full scale range–VREF1/10+VREF1/10mV
Differential nonlinearity16-bit, No missing codes±1LSB
Integral nonlinearity16-bit, Best fit over input voltage range±5.2±22.3LSB
Offset error16-bit, Post-calibration±1.3±2.6LSB
Offset error drift15-bit + sign, Post-calibration0.040.07LSB/°C
Gain error15-bit + sign, Over input voltage range±131±492LSB
Gain error drift15-bit + sign, Over input voltage range4.39.8LSB/°C
Effective input resistance2.5

ADC Digital Filter

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
tCONVADCTL[SPEED1, SPEED0] = 0, 031.25ms
ADCTL[SPEED1, SPEED0] = 0, 115.63
ADCTL[SPEED1, SPEED0] = 1, 07.81
ADCTL[SPEED1, SPEED0] = 1, 11.95
ResolutionNo missing codes, ADCTL[SPEED1, SPEED0] = 0, 016Bits
Effective resolutionWith sign, ADCTL[SPEED1, SPEED0] = 0, 01415Bits
With sign, ADCTL[SPEED1, SPEED0] = 0, 11314
With sign, ADCTL[SPEED1, SPEED0] = 1, 01112
With sign, ADCTL[SPEED1, SPEED0] = 1, 1910

ADC Multiplexer

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
KScaling factorVCELL/INT–VSS, BAT–VCELL/INT0.19800.20000.2020
BAT–VSS, PACK–VSS0.04850.0500.051
VREF1/20.4900.5000.510
VINInput voltage rangeBAT–VSS, PACK–VSS–0.220V
TS1 –0.20.8 × VREF1
TS1 –0.20.8 × VREG
ILKGInput leakage currentVCELL/INT, BAT, cell detach detection off, ADC multiplexer off1µA

Internal Temperature Sensor

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VTEMPInternal temperature sensor voltage driftVTEMPP–1.9–2.0–2.1mV/°C
VTEMPP – VTEMPN (1)0.1770.1780.179
Assured by design

NTC Thermistor Measurement Support

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
RNTC(PU)Internal pull-up resistanceTS1 14.41821.6
RNTC(DRIFT)Resistance drift over temperatureTS1 –360–280–200PPM/°C

High-Frequency Oscillator

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
fHFOOperating frequency16.78MHz
fHFO(ERR)Frequency errorTA = –20°C to 70°C, includes frequency drift–2.5%±0.25%2.5%
TA = –40°C to 85°C, includes frequency drift–3.5%±0.25%3.5%
tHFO(SU)Start-up timeTA = –20°C to 85°C, Oscillator frequency within +/–3% of nominal, CLKCTL[HFRAMP] = 14ms
Oscillator frequency within +/–3% of nominal, CLKCTL[HFRAMP] = 0100µs

Low-Frequency Oscillator

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
fLFOOperating frequency262.144kHz
fLFO(LP)Operating frequency in low power mode247kHz
fLFO(ERR)Frequency errorTA = –20°C to 70°C, includes frequency drift–1.5%±0.25%1.5%
TA = –40°C to 85°C, includes frequency drift–2.5%±0.25%2.5%
fLFO(LPERR)Frequency error in low power mode–5%5%
fLFO(FAIL)Failure detection frequency3080100kHz

Voltage Reference 1

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VREF1Internal reference voltageTA = 25°C, after trim1.2151.2201.225V
VREF1(DRIFT)Internal reference voltage driftTA = 0°C to 60°C, after trim±50PPM/°C
TA = –40°C to 85°C, after trim±80

Voltage Reference 2

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VREF2Internal reference voltageTA = 25°C, after trim1.2151.2201.225V
VREF2(DRIFT)Internal reference voltage driftTA = 0°C to 60°C, after trim±50PPM/°C
TA = –40°C to 85°C, after trim±80

Instruction Flash

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
Data retention10(1)Years
Flash programming write cycles1000(1)Cycles
tPROGWORDWord programming timeTA = –40°C to 85°C40µs
tMASSERASEMass-erase timeTA = –40°C to 85°C40ms
tPAGEERASEPage-erase timeTA = –40°C to 85°C40ms
IFLASHREADFlash-read currentTA = –40°C to 85°C2mA
IFLASHWRITEFlash-write currentTA = –40°C to 85°C5mA
IFLASHERASEFlash-erase currentTA = –40°C to 85°C15mA
Assured by design

Data Flash

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
Data retention10(1)Years
Flash programming write cycles20000(1)Cycles
tPROGWORDWord programming timeTA = –40°C to 85°C40µs
tMASSERASEMass-erase timeTA = –40°C to 85°C40ms
tPAGEERASEPage-erase timeTA = –40°C to 85°C40ms
IFLASHREADFlash-read currentTA = –40°C to 85°C1mA
IFLASHWRITEFlash-write currentTA = –40°C to 85°C5mA
IFLASHERASEFlash-erase currentTA = –40°C to 85°C15mA
Assured by design

Current Protection Thresholds

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VOCDOCD detection threshold voltage rangeVOCD = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 1–16.6–100mV
VOCD = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 0–8.3–50
ΔVOCDOCD detection threshold voltage program stepVOCD = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 1–5.56mV
VOCD = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 0–2.78
ΔVSCCSCC detection threshold voltage rangeVSCC = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 144.4200mV
VSCC = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 022.2100
ΔVSCCSCC detection threshold voltage program stepVSCC = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 122.2mV
VSCC = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 011.1
VSCD1SCD1 detection threshold voltage rangeVSCD1 = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 1–44.4–200mV
VSCD1 = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 0–22.2–100
ΔVSCD1SCD1 detection threshold voltage program stepVSCD1 = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 1–22.2mV
VSCD1 = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 0–11.1
VSCD2SCD2 detection threshold voltage rangeVSCD2 = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 1–44.4–200mV
VSCD2 = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 0–22.2–100
ΔVSCD2SCD2 detection threshold voltage program stepVSCD2 = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 1–22.2mV
VSCD2 = VSRP – VSRN, PROTECTION_CONTROL[RSNS] = 0–11.1

Current Protection Timing

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINNOMMAXUNIT
tOCDOCD detection delay time131ms
ΔtOCDOCD detection delay time program step2ms
tSCCSCC detection delay time0915µs
ΔtSCCSCC detection delay time program step61µs
tSCD1SCD1 detection delay timePROTECTION_CONTROL[SCDDx2] = 00915µs
PROTECTION_CONTROL[SCDDx2] = 101850
ΔtSCD1SCD1 detection delay time program stepPROTECTION_CONTROL[SCDDx2] = 061µs
PROTECTION_CONTROL[SCDDx2] = 1121
tSCD2SCD2 detection delay timePROTECTION_CONTROL[SCDDx2] = 00458µs
PROTECTION_CONTROL[SCDDx2] = 10915
ΔtSCD2SCD2 detection delay time program stepPROTECTION_CONTROL[SCDDx2] = 030.5µs
PROTECTION_CONTROL[SCDDx2] = 161
tDETECTCurrent fault detect timeVSRP – VSRN = VT – 3 mV for OCD, SCD1, and SC2, VSRP – VSRN = VT + 3 mV for SCC160µs
tACCCurrent fault delay time accuracyMax delay setting–10%10%

N-CH FET Drive (CHG, DSG)

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
Output voltage ratio RatioDSG = (VDSG – VBAT) / VBAT, 2.2 V < VBAT < 4.07 V, 10 MΩ between PACK and DSG2.1332.3332.467
RatioCHG = (VCHG – VBAT) / VBAT, 2.2 V < VBAT < 4.07 V, 10 MΩ between BAT and CHG2.1332.3332.467
V(FETON)Output voltage, CHG and DSG on VDSG(ON) = VDSG – VBAT, 4.07 V ≤ VBAT ≤ 18 V, 10 MΩ between PACK and DSG8.759.510.25V
VCHG(ON) = VCHG – VBAT, 4.07 V ≤ VBAT ≤ 18 V, 10 MΩ between BAT and CHG8.759.510.25
V(FETOFF)Output voltage, CHG and DSG offVDSG(OFF) = VDSG – VPACK, 10 MΩ between PACK and DSG–0.40.4V
VCHG(OFF) = VCHG – VBAT, 10 MΩ between BAT and CHG–0.40.4
tRRise timeVDSG from 0% to 35% VDSG(ON)(TYP), VBAT ≥ 2.2 V, CL = 4.7 nF between DSG and PACK, 5.1 kΩ between DSG and CL, 10 MΩ between PACK and DSG200500µs
VCHG from 0% to 35% VCHG(ON)(TYP), VBAT ≥ 2.2 V, CL = 4.7 nF between CHG and BAT, 5.1 kΩ between CHG and CL, 10 MΩ between BAT and CHG200500
tFFall timeVDSG from VDSG(ON)(TYP) to 1 V, VBAT ≥ 2.2 V, CL = 4.7 nF between DSG and PACK, 5.1 kΩ between DSG and CL, 10 MΩ between PACK and DSG40300µs
VCHG from VCHG(ON)(TYP) to 1 V, VBAT ≥ 2.2 V, CL = 4.7 nF between CHG and BAT, 5.1 kΩ between CHG and CL, 10 MΩ between BAT and CHG40200

I2C Interface I/O

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINTYPMAXUNIT
VIHInput voltage highSCL, SDA, VREG = 1.8 V (STANDARD and FAST modes)0.7 × VREGV
VILInput voltage lowSCL, SDA, VREG = 1.8 V (STANDARD and FAST modes)–0.50.3 × VREGV
VOLOutput low voltageSCL, SDA, VREG = 1.8 V, IOL = 3 mA (FAST mode)0.2 × VREGV
SCL, SDA, VREG > 2.0 V, IOL = 3 mA (STANDARD and FAST modes)0.4V
CINInput capacitance10pF
ILKGInput leakage current1µA
RPDPull-down resistance3.3

I2C Interface Timing

Typical values stated where TA = 25ºC, Min/Max values stated where TA = –40ºC to 85ºC (unless otherwise noted)
PARAMETERTEST CONDITIONMINNOMMAXUNIT
tRClock rise time10% to 90%300ns
tFClock fall time90% to 10%300ns
tHIGHClock high period600ns
tLOWClock low period1.3µs
tSU(START)Repeated start setup time600ns
td(START)Start for first falling edge to SCL600ns
tSU(DATA)Data setup time100ns
tHD(DATA)Data hold time0µs
tSU(STOP)Stop setup time600ns
tBUFBus free time between stop and start1.3µs
fSWClock operating frequencySLAVE mode, SCL 50% duty cycle400kHz
bq27750 i2c_comp_lus815.gif Figure 1. I2C Timing

Typical Characteristics

bq27750 C001_SLUSAS3.png
Figure 2. CC Offset Error vs. Temperature
bq27750 C006_SLUSAS3.png
Figure 4. Reference Voltage vs. Temperature
bq27750 C008_SLUSAS3.png
Figure 6. High-Frequency Oscillator vs. Temperature
bq27750 C010_SLUSAS3.png
Threshold setting is 88.8 mV.
Figure 8. Short Circuit Charge Protection Threshold vs. Temperature
bq27750 C012_SLUSAS3.png
Threshold setting is –177.7 mV.
Figure 10. Short Circuit Discharge 2 Protection Threshold vs. Temperature
bq27750 C014_SLUSAS3.png
Threshold setting is 465 µs.
Figure 12. Short Circuit Charge Current Delay Time vs. Temperature
bq27750 C016_SLUSAS3.png
Figure 14. VCELL Measurement at 2.5-V vs. Temperature
bq27750 C018_SLUSAS3.png
This is the VCELL average for single cell.
Figure 16. VCELL Measurement at 4.25-V vs. Temperature
bq27750 C003_SLUSAS3.gif
Figure 3. ADC Offset Error vs. Temperature
bq27750 C007_SLUSAS3.png
Figure 5. Low-Frequency Oscillator vs. Temperature
bq27750 C009_SLUSAS3.png
Threshold setting is 25 mV.
Figure 7. Overcurrent Discharge Protection Threshold vs. Temperature
bq27750 C011_SLUSAS3.png
Threshold setting is –88.8 mV.
Figure 9. Short Circuit Discharge 1 Protection Threshold vs. Temperature
bq27750 C013_SLUSAS3.png
Threshold setting is 11 ms.
Figure 11. Overcurrent Delay Time vs. Temperature
bq27750 C015_SLUSAS3.png
Threshold setting is 465 µs (including internal delay).
Figure 13. Short Circuit Discharge 1 Delay Time vs. Temperature
bq27750 C017_SLUSAS3.png
This is the VCELL average for single cell.
Figure 15. VCELL Measurement at 3.5-V vs. Temperature
bq27750 C019_SLUSAS3.png
ISET = 100 mA, RSNS= 1 Ω
Figure 17. I measured vs. Temperature