ZHCSBT2G November 2012 – October 2017 66AK2H06 , 66AK2H12 , 66AK2H14
PRODUCTION DATA.
The device also supports 34 emulation pins — EMU[33:0], which includes 19 dedicated EMU pins and 15 pins multiplexed with GPIO. These pins are shared by A15/DSP/STM trace, cross triggering, and debug boot modes as shown in Table 11-61. The 34-pin dedicated emulation interface is also defined in the following table.
NOTE
If EMU[1:0] signals are shared for cross-triggering purposes in the board level, they should not be used for trace purposes.
EMU PINS | CROSS TRIGGERING | ARM TRACE | DSP TRACE | STM | DEBUG BOOT MODE | ||
---|---|---|---|---|---|---|---|
EMU33 | TRCDTa[29] | TRCDTb[31] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or Hi-ZTRCCLK, or Hi-Z | ||||
EMU32 | TRCDTa[28] | TRCDTb[30] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU31 | TRCDTa[27] | TRCDTb[29] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU30 | TRCDTa[26] | TRCDTb[28] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU29 | TRCDTa[25] | TRCDTb[27] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU28 | TRCDTa[24] | TRCDTb[26] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU27 | TRCDTa[23] | TRCDTb[25] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU26 | TRCDTa[22] | TRCDTb[24] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU25 | TRCDTa[21] | TRCDTb[23] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU24 | TRCDTa[20] | TRCDTb[22] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||||
EMU23 | TRCDTa[19] | TRCDTb[21] | TRCDTa[19] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | |||
EMU22 | TRCDTa[18] | TRCDTb[20] | TRCDTa[18] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | |||
EMU21 | TRCDTa[17] | TRCDTb[19] | TRCDTa[17] | TRCDTb[19] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU20 | TRCDTa[16] | TRCDTb[18] | TRCDTa[16] | TRCDTb[18] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU19 | TRCDTa[15] | TRCDTb[17] | TRCDTa[15] | TRCDTb[17] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU18 | TRCDTa[14] | TRCDTb[16] | TRCDTa[14] | TRCDTb[16] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU17 | TRCDTa[13] | TRCDTb[15] | TRCDTa[13] | TRCDTb[15] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU16 | TRCDTa[12] | TRCDTb[14] | TRCDTa[12] | TRCDTb[14] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU15 | TRCDTa[11] | TRCDTb[13] | TRCDTa[11] | TRCDTb[13] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU14 | TRCDTa[10] | TRCDTb[12] | TRCDTa[10] | TRCDTb[12] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU13 | TRCDTa[9] | TRCDTb[11] | TRCDTa[9] | TRCDTb[11] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU12 | TRCDTa[8] | TRCDTb[10] | TRCDTa[8] | TRCDTb[10] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU11 | TRCDTa[7] | TRCDTb[9] | TRCDTa[7] | TRCDTb[9] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU10 | TRCDTa[6] | TRCDTb[8] | TRCDTa[6] | TRCDTb[8] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU9 | TRCDTa[5] | TRCDTb[7] | TRCDTa[5] | TRCDTb[7] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU8 | TRCDTa[4] | TRCDTb[6] | TRCDTa[4] | TRCDTb[6] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU7 | TRCDTa[3] | TRCDTb[5] | TRCDTa[3] | TRCDTb[5] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU6 | TRCDTa[2] | TRCDTb[4] | TRCDTa[2] | TRCDTb[4] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU5 | TRCDTa[1] | TRCDTb[3] | TRCDTa[1] | TRCDTb[3] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU4 | TRCDTa[0] | TRCDTb[2] | TRCDTa[0] | TRCDTb[2] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU3 | TRCCTRL | TRCCTRL | TRCCLKB | TRCCLKB | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU2 | TRCCLK | TRCCLK | TRCCLKA | TRCCLKA | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | ||
EMU1 | Trigger1 | TRCDTb[1] | TRCDTb[1] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | dbgbootmode[1] | ||
EMU0 | Trigger0 | TRCDTb[0] | TRCDTb[0] | TRCDT3, or TRCDT2, or TRCDT1, or TRCDT0, or TRCCLK, or Hi-Z | dbgbootmode[0] |